| /external/llvm/lib/Target/SystemZ/ |
| SystemZLongBranch.cpp | 223 // Relaxes to BRCL, which is 2 bytes longer.
228 // Relaxes to A(G)HI and BRCL, which is 6 bytes longer.
233 // Relaxes to a C(L)R/BRCL sequence, which is 2 bytes longer.
238 // Relaxes to a C(L)GR/BRCL sequence, which is 4 bytes longer.
243 // Relaxes to a C(G)HI/BRCL sequence, which is 4 bytes longer.
248 // Relaxes to a CL(G)FI/BRCL sequence, which is 6 bytes longer.
349 // by a BRCL on the result.
358 MachineInstr *BRCL = BuildMI(*MBB, MI, DL, TII->get(SystemZ::BRCL))
363 BRCL->addRegisterKilled(SystemZ::CC, &TII->getRegisterInfo())
[all...] |
| SystemZAsmPrinter.cpp | 209 LoweredMI = MCInstBuilder(SystemZ::BRCL)
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| SystemZInstrInfo.cpp | [all...] |
| /external/v8/src/s390/ |
| assembler-s390-inl.h | 445 if (BRASL == op1 || BRCL == op1) {
502 if (BRASL == op1 || BRCL == op1) {
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| assembler-s390.cc | 366 } else if (LLILF == opcode || BRCL == opcode || LARL == opcode ||
388 opcode == BRCL || opcode == BRASL);
397 } else if (BRCL == opcode || LARL == opcode || BRASL == opcode) {
423 } else if (LLILF == opcode || BRCL == opcode || LARL == opcode ||
529 brcl(c, Operand(offset)); // long jump
1678 void Assembler::brcl(Condition c, const Operand& opnd, bool isCodeTarget) { function in class:v8::internal::Assembler
[all...] |
| constants-s390.h | 233 BRCL = 0xC04, // Branch Relative On Condition Long
[all...] |
| simulator-s390.h | 685 EVALUATE(BRCL);
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| simulator-s390.cc | [all...] |
| /external/v8/src/ic/s390/ |
| ic-s390.cc | 584 // BRC/BRCL // 4 / 6 bytes
587 // BRC/BRCL // 4 / 6 bytes
602 } else if (Instruction::S390OpcodeValue(branch_address) == BRCL) {
628 } else if (Instruction::S390OpcodeValue(branch_address) == BRCL) {
633 patcher.masm()->brcl(cc, Operand((branch_instr & 0xffffffff) << 1));
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