| /art/compiler/utils/mips/ |
| assembler_mips32r6_test.cc | 469 TEST_F(AssemblerMIPS32r6Test, CmpLtD) {
470 DriverStr(RepeatFFF(&mips::MipsAssembler::CmpLtD, "cmp.lt.d ${reg1}, ${reg2}, ${reg3}"),
749 __ CmpLtD(mips::F0, mips::F2, mips::F4);
774 __ CmpLtD(mips::F0, mips::F2, mips::F4);
|
| assembler_mips.h | 406 void CmpLtD(FRegister fd, FRegister fs, FRegister ft); // R6
[all...] |
| assembler_mips.cc | [all...] |
| /art/compiler/optimizing/ |
| code_generator_mips64.cc | [all...] |
| code_generator_mips.cc | [all...] |
| intrinsics_mips64.cc | [all...] |
| /art/compiler/utils/mips64/ |
| assembler_mips64_test.cc | 552 TEST_F(AssemblerMIPS64Test, CmpLtD) {
553 DriverStr(RepeatFFF(&mips64::Mips64Assembler::CmpLtD, "cmp.lt.d ${reg1}, ${reg2}, ${reg3}"),
[all...] |
| assembler_mips64.h | 619 void CmpLtD(FpuRegister fd, FpuRegister fs, FpuRegister ft);
[all...] |
| assembler_mips64.cc | [all...] |
