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  /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/
convolve_neon.s 61 VADD.S32 D20, D20, D21
62 VPADD.S32 D20, D20, D20
63 VMOV.S32 r5, D20[0]
97 VADD.S32 D20, D20, D21
98 VPADD.S32 D20, D20, D2
    [all...]
Norm_Corr_neon.s 95 VQADD.S32 D20, D20, D21
96 VMOV.S32 r9, D20[0]
97 VMOV.S32 r10, D20[1]
158 VQADD.S32 D20, D20, D21
161 VPADD.S32 D20, D20, D20 @D20[0] --- L_tmp1 <<
    [all...]
syn_filt_neon.s 85 VQRSHRN.S32 D20, Q9, #12
86 VMOV.S16 r9, D20[0]
87 VEXT.8 D7, D7, D20, #2
Syn_filt_32_neon.s 77 VPADD.S32 D28, D20, D21
111 VSHRN.S32 D20, Q12, #16 @sig_hi[i] = L_tmp >> 16@
112 VMOV.S16 r10, D20[0]
114 VEXT.8 D7, D7, D20, #2
Dot_p_neon.s 52 VMLAL.S16 Q15, D20, D4
  /external/libhevc/decoder/arm/
ihevcd_fmt_conv_420sp_to_rgba8888.s 236 VQMOVUN.S16 D20,Q10
241 VZIP.8 D20,D21
250 VST1.32 D20,[R2]!
257 @//D14-D20 - TOALLY HAVE 16 VALUES
287 VQMOVUN.S16 D20,Q10
292 VZIP.8 D20,D21
301 VST1.32 D20,[R8]!
367 VQMOVUN.S16 D20,Q10
372 VZIP.8 D20,D21
381 VST1.32 D20,[R2]
    [all...]
  /external/llvm/test/MC/MachO/
x86_32-symbols.s 65 D20:
990 // CHECK: Name: D20 (143)
    [all...]
x86_64-symbols.s 65 D20:
286 // CHECK-NEXT: Name: D20 (146)
  /external/swiftshader/third_party/LLVM/test/MC/MachO/
x86_32-symbols.s 65 D20:
861 // CHECK: ('_string', 'D20')
x86_64-symbols.s 65 D20:
794 // CHECK: ('_string', 'D20')
  /art/runtime/arch/arm64/
registers_arm64.h 134 D20 = 20,
context_arm64.cc 110 fprs_[D20] = nullptr;
quick_method_frame_info_arm64.h 73 (1 << art::arm64::D18) | (1 << art::arm64::D19) | (1 << art::arm64::D20) |
  /external/libhevc/common/arm/
ihevc_sao_band_offset_chroma.s 261 VCLE.U8 D20,D9,D29 @vcle_u8(band_table.val[0], vdup_n_u8(16))
262 VORR.U8 D9,D9,D20 @band_table.val[0] = vorr_u8(band_table.val[0], au1_cmp)
271 VCLE.U8 D20,D9,D29 @vcle_u8(band_table.val[0], vdup_n_u8(16))
272 VAND.U8 D9,D9,D20 @band_table.val[0] = vand_u8(band_table.val[0], au1_cmp)
305 VSUB.I8 D20,D18,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v)
318 VTBX.8 D18,{D9-D12},D20 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(au1_cur_row_deint.val[1], band_pos_v))
359 VSUB.I8 D20,D18,D30 @vsub_u8(au1_cur_row_deint.val[1], band_pos_v)
370 VTBX.8 D18,{D9-D12},D20 @vtbx4_u8(au1_cur_row_deint.val[1], band_table_v, vsub_u8(au1_cur_row_deint.val[1], band_pos_v))
ihevc_sao_edge_offset_class3_chroma.s 432 VMOVN.I16 D20,Q10 @I vmovn_s16(pi2_tmp_cur_row.val[0])
533 VLD1.8 D20,[r2] @edge_idx_tbl = vld1_s8(gi1_table_edge_idx)
537 VTBL.8 D18,{D20},D18 @III vtbl1_s8(edge_idx_tbl, vget_low_s8(edge_idx))
541 VTBL.8 D19,{D20},D19 @III vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
586 VMOVN.I16 D20,Q10 @III vmovn_s16(pi2_tmp_cur_row.val[0])
    [all...]
ihevc_sao_band_offset_luma.s 209 VSUB.I8 D20,D19,D31 @vsub_u8(au1_cur_row, band_pos)
211 VTBX.8 D19,{D1-D4},D20 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, band_pos))
  /external/llvm/lib/Target/ARM/
ARMBaseRegisterInfo.h 69 case D23: case D22: case D21: case D20:
  /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/
armVCM4P10_DeblockingChroma_unsafe_s.s 79 dDelta DN D20.S8
144 ;// dDelta-d20
armVCM4P10_Interpolate_Chroma_s.s 100 dOutRow2 DN D20.U8
102 dOutRow2U64 DN D20.U64
armVCM4P10_DeblockingLuma_unsafe_s.s 74 dDelta DN D20.S8
181 ;// dDelta-d20
  /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV7/
Radix4FFT_v7.s 116 VST2.I32 {D20, D21, D22, D23}, [r8]
126 VST2.I32 {D20, D21, D22, D23}, [r8]!
  /external/llvm/lib/Target/AArch64/Utils/
AArch64BaseInfo.h 132 case AArch64::D20: return AArch64::B20;
172 case AArch64::B20: return AArch64::D20;
  /art/compiler/utils/arm/
constants_arm.h 82 D20 = 20,
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/
ARMBaseInfo.h 176 case S20: case D20: return 20;
  /art/compiler/utils/arm64/
managed_register_arm64_test.cc 192 reg = Arm64ManagedRegister::FromDRegister(D20);
200 EXPECT_EQ(D20, reg.AsDRegister());
202 EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D20)));
566 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D20)));
589 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D20)));
    [all...]

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