/external/llvm/test/MC/MachO/ |
x86_32-symbols.s | 80 D25: 1035 // CHECK: Name: D25 (68) [all...] |
x86_64-symbols.s | 80 D25: 331 // CHECK-NEXT: Name: D25 (80)
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/external/swiftshader/third_party/LLVM/test/MC/MachO/ |
x86_32-symbols.s | 80 D25: 901 // CHECK: ('_string', 'D25')
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x86_64-symbols.s | 80 D25: 834 // CHECK: ('_string', 'D25')
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/external/libhevc/common/arm/ |
ihevc_sao_edge_offset_class1_chroma.s | 203 VTBL.8 D25,{D8},D23 204 VZIP.8 D24,D25 207 @VTBL.8 D25,D7,D23 @II offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 215 VADDW.S8 Q14,Q14,D25 @II pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset) 251 VTBL.8 D25,{D8},D23 252 VZIP.8 D24,D25 260 @VTBL.8 D25,D7,D23 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 262 VADDW.S8 Q14,Q14,D25 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset) 352 VTBL.8 D25,{D8},D23 353 VZIP.8 D24,D25 [all...] |
ihevc_sao_band_offset_chroma.s | 209 VLD1.8 D25,[r8] @pi1_sao_offset_v load 212 VDUP.8 D29,D25[1] @vdup_n_u8(pi1_sao_offset_v[1]) 215 VDUP.8 D28,D25[2] @vdup_n_u8(pi1_sao_offset_v[2]) 218 VDUP.8 D27,D25[3] @vdup_n_u8(pi1_sao_offset_v[3]) 221 VDUP.8 D26,D25[4] @vdup_n_u8(pi1_sao_offset_v[4])
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ihevc_sao_edge_offset_class2_chroma.s | 530 VTBL.8 D25,{D7},D27 @II 534 VZIP.8 D24,D25 @II 557 VADDW.S8 Q13,Q13,D25 @II pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset) [all...] |
ihevc_sao_edge_offset_class0_chroma.s | 226 VTBL.8 D25,{D10},D25 @II vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx)) 231 VUZP.8 D24,D25 @II 238 VTBL.8 D27,{D0},D25 @II
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ihevc_sao_edge_offset_class1.s | 196 VTBL.8 D25,{D7},D23 @II offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 202 VADDW.S8 Q14,Q14,D25 @II pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset) 242 VTBL.8 D25,{D7},D23 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 244 VADDW.S8 Q14,Q14,D25 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset)
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ihevc_sao_edge_offset_class3_chroma.s | 530 VTBL.8 D25,{D7},D27 @II 534 VZIP.8 D24,D25 @II 554 VADDW.S8 Q13,Q13,D25 @II pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset) [all...] |
ihevc_sao_edge_offset_class3.s | 424 VTBL.8 D25,{D7},D27 @II offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 438 VADDW.S8 Q13,Q13,D25 @II pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset) 521 VTBL.8 D25,{D7},D27 @offset = vtbl1_s8(offset_tbl, vget_high_s8(edge_idx)) 526 VADDW.S8 Q11,Q11,D25 @pi2_tmp_cur_row.val[1] = vaddw_s8(pi2_tmp_cur_row.val[1], offset) [all...] |
ihevc_sao_edge_offset_class0.s | 313 VTBL.8 D25,{D10},D25 @vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx))
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/art/runtime/arch/arm64/ |
registers_arm64.h | 139 D25 = 25,
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context_arm64.cc | 115 fprs_[D25] = nullptr;
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quick_method_frame_info_arm64.h | 75 (1 << art::arm64::D24) | (1 << art::arm64::D25) | (1 << art::arm64::D26) |
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/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
omxVCM4P10_FilterDeblockingLuma_VerEdge_I_s.s | 83 dRown5 DN D25.U8 92 ;// dQ_1n DN D25.U8 ;!!;Temp2 105 dRow5n DN D25.U8 175 dQ_1n DN D25.U8 204 dQ_1n DN D25.U8 ;!!;Temp2
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armVCM4P10_DeblockingLuma_unsafe_s.s | 93 dQ_1n DN D25.U8 122 dQ_1n DN D25.U8 ;!!;Temp2 131 ;// Outputs - Pixels - P0-P1: D29-D30, Q0-Q1: D24-D25 265 ;// Outputs - Pixels - P0-P2: D29-D31, Q0-Q2: D24,D25,D28
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omxVCM4P10_FilterDeblockingLuma_HorEdge_I_s.s | 129 dQ_1n DN D25.U8 158 dQ_1n DN D25.U8 ;!!;Temp2
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omxVCM4P10_PredictIntra_16x16_s.s | 100 dV1 DN D25.S32 112 dHV11 DN D25.S64
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/external/llvm/lib/Target/ARM/ |
ARMBaseRegisterInfo.h | 68 case D27: case D26: case D25: case D24:
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/external/llvm/lib/Target/AArch64/Utils/ |
AArch64BaseInfo.h | 137 case AArch64::D25: return AArch64::B25; 177 case AArch64::B25: return AArch64::D25;
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/art/compiler/utils/arm/ |
constants_arm.h | 87 D25 = 25,
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
ARMBaseInfo.h | 181 case S25: case D25: return 25;
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/frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
Dot_p_neon.s | 57 VMLAL.S16 Q15, D25, D9
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/external/llvm/lib/Target/AArch64/ |
AArch64PBQPRegAlloc.cpp | 76 case AArch64::D25:
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