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    Searched refs:DCR (Results 1 - 10 of 10) sorted by null

  /external/llvm/unittests/MC/
Disassembler.cpp 33 LLVMDisasmContextRef DCR = LLVMCreateDisasm("x86_64-pc-linux", nullptr, 0,
35 if (!DCR)
42 InstSize = LLVMDisasmInstruction(DCR, BytesP, NumBytes, PC, OutString,
50 InstSize = LLVMDisasmInstruction(DCR, BytesP, NumBytes, PC, OutString,
58 InstSize = LLVMDisasmInstruction(DCR, BytesP, NumBytes, PC, OutString,
63 LLVMDisasmDispose(DCR);
  /external/llvm/lib/MC/MCDisassembler/
Disassembler.cpp 118 void LLVMDisasmDispose(LLVMDisasmContextRef DCR){
119 LLVMDisasmContext *DC = (LLVMDisasmContext *)DCR;
239 size_t LLVMDisasmInstruction(LLVMDisasmContextRef DCR, uint8_t *Bytes,
242 LLVMDisasmContext *DC = (LLVMDisasmContext *)DCR;
289 int LLVMSetDisasmOptions(LLVMDisasmContextRef DCR, uint64_t Options){
291 LLVMDisasmContext *DC = (LLVMDisasmContext *)DCR;
298 LLVMDisasmContext *DC = (LLVMDisasmContext *)DCR;
305 LLVMDisasmContext *DC = (LLVMDisasmContext *)DCR;
321 LLVMDisasmContext *DC = (LLVMDisasmContext *)DCR;
328 LLVMDisasmContext *DC = (LLVMDisasmContext *)DCR;
    [all...]
  /external/swiftshader/third_party/LLVM/lib/MC/MCDisassembler/
Disassembler.cpp 91 void LLVMDisasmDispose(LLVMDisasmContextRef DCR){
92 LLVMDisasmContext *DC = (LLVMDisasmContext *)DCR;
132 size_t LLVMDisasmInstruction(LLVMDisasmContextRef DCR, uint8_t *Bytes,
135 LLVMDisasmContext *DC = (LLVMDisasmContext *)DCR;
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/sh64/
creg-1.s 21 getcon dcr,r35
39 getcon DCR,r21
57 putcon r35,dcr
75 putcon r21,DCR
  /external/neven/
Android.mk 23 Embedded/common/src/b_APIEm/DCR.c \
104 FaceRecEm/common/src/b_FDSDK/DCR.c \
  /prebuilts/go/darwin-x86/src/cmd/internal/obj/ppc64/
list9.go 84 return fmt.Sprintf("DCR(%d)", r-REG_DCR0)
  /prebuilts/go/linux-x86/src/cmd/internal/obj/ppc64/
list9.go 84 return fmt.Sprintf("DCR(%d)", r-REG_DCR0)
  /device/google/contexthub/firmware/os/platform/stm32/
platform.c 87 volatile uint16_t DCR;
  /toolchain/binutils/binutils-2.25/opcodes/
m32r-opinst.c 376 { OUTPUT, "dcr", HW_H_CR, CGEN_MODE_USI, OP_ENT (DCR), 0, 0 },
    [all...]
m32r-opc.c 810 /* mvtc $sr,$dcr */
813 { { MNEM, ' ', OP (SR), ',', OP (DCR), 0 } },
    [all...]

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