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    Searched refs:DstR (Results 1 - 7 of 7) sorted by null

  /external/llvm/lib/Target/Hexagon/
RDFCopy.cpp 35 RegisterRef DstR = { Dst.getReg(), Dst.getSubReg() };
37 if (TargetRegisterInfo::isVirtualRegister(DstR.Reg)) {
41 if (MRI.getRegClass(DstR.Reg) != MRI.getRegClass(SrcR.Reg))
43 } else if (TargetRegisterInfo::isPhysicalRegister(DstR.Reg)) {
47 if (TRI.getMinimalPhysRegClass(DstR.Reg) !=
54 EM.insert(std::make_pair(DstR, SrcR));
86 // Insert DstR into the map.
HexagonRDFOpt.cpp 98 auto mapRegs = [MI,&EM] (RegisterRef DstR, RegisterRef SrcR) -> void {
99 EM.insert(std::make_pair(DstR, SrcR));
HexagonFrameLowering.cpp     [all...]
HexagonExpandCondsets.cpp 250 MachineBasicBlock::iterator At, unsigned DstR,
608 /// destination register DstR:DstSR, and using the predicate register from
613 unsigned DstR, unsigned DstSR, const MachineOperand &PredOp,
628 .addReg(DstR, State, DstSR)
    [all...]
HexagonGenInsert.cpp 488 bool isValidInsertForm(unsigned DstR, unsigned SrcR, unsigned InsR,
637 bool HexagonGenInsert::isValidInsertForm(unsigned DstR, unsigned SrcR,
639 const TargetRegisterClass *DstRC = MRI->getRegClass(DstR);
645 // The "source" register must be of the same class as DstR.
    [all...]
HexagonSplitDouble.cpp 965 unsigned DstR = MI->getOperand(0).getReg();
966 if (MRI->getRegClass(DstR) == DoubleRC) {
    [all...]
  /external/llvm/lib/Target/X86/
X86FixupLEAs.cpp 346 const unsigned DstR = MI.getOperand(0).getReg();
349 if ((SrcR1 == 0 || SrcR1 != DstR) && (SrcR2 == 0 || SrcR2 != DstR))
377 const MachineOperand &Src1 = MI.getOperand(SrcR1 == DstR ? 1 : 3);
378 const MachineOperand &Src2 = MI.getOperand(SrcR1 == DstR ? 3 : 1);
388 const MachineOperand &SrcR = MI.getOperand(SrcR1 == DstR ? 1 : 3);

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