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Searched
refs:FpuRegister
(Results
1 - 11
of
11
) sorted by null
/art/compiler/utils/mips64/
assembler_mips64.h
561
void Bc1eqz(
FpuRegister
ft, uint16_t imm16);
562
void Bc1nez(
FpuRegister
ft, uint16_t imm16);
564
void AddS(
FpuRegister
fd,
FpuRegister
fs,
FpuRegister
ft);
565
void SubS(
FpuRegister
fd,
FpuRegister
fs,
FpuRegister
ft);
566
void MulS(
FpuRegister
fd,
FpuRegister
fs, FpuRegister ft)
[
all
...]
assembler_mips64.cc
164
void Mips64Assembler::EmitFR(int opcode, int fmt,
FpuRegister
ft,
FpuRegister
fs,
FpuRegister
fd,
178
void Mips64Assembler::EmitFI(int opcode, int fmt,
FpuRegister
ft, uint16_t imm) {
790
void Mips64Assembler::Bc1eqz(
FpuRegister
ft, uint16_t imm16) {
794
void Mips64Assembler::Bc1nez(
FpuRegister
ft, uint16_t imm16) {
853
Bc1eqz(static_cast<
FpuRegister
>(rs), imm16_21);
857
Bc1nez(static_cast<
FpuRegister
>(rs), imm16_21);
865
void Mips64Assembler::AddS(
FpuRegister
fd,
FpuRegister
fs, FpuRegister ft)
[
all
...]
managed_register_mips64.h
41
// [R..F[ floating-point registers (enum
FpuRegister
)
51
// * floating-point register (enum
FpuRegister
)
63
constexpr
FpuRegister
AsFpuRegister() const {
65
return static_cast<
FpuRegister
>(id_ - kNumberOfGpuRegIds);
73
constexpr
FpuRegister
AsOverlappingFpuRegister() const {
75
return static_cast<
FpuRegister
>(AsVectorRegister());
112
static constexpr Mips64ManagedRegister FromFpuRegister(
FpuRegister
r) {
assembler_mips64_test.cc
39
mips64::
FpuRegister
,
45
mips64::
FpuRegister
,
156
fp_registers_.push_back(new mips64::
FpuRegister
(mips64::F0));
157
fp_registers_.push_back(new mips64::
FpuRegister
(mips64::F1));
158
fp_registers_.push_back(new mips64::
FpuRegister
(mips64::F2));
159
fp_registers_.push_back(new mips64::
FpuRegister
(mips64::F3));
160
fp_registers_.push_back(new mips64::
FpuRegister
(mips64::F4));
161
fp_registers_.push_back(new mips64::
FpuRegister
(mips64::F5));
162
fp_registers_.push_back(new mips64::
FpuRegister
(mips64::F6));
163
fp_registers_.push_back(new mips64::
FpuRegister
(mips64::F7))
[
all
...]
managed_register_mips64_test.cc
109
TEST(Mips64ManagedRegister,
FpuRegister
) {
/art/runtime/arch/mips64/
registers_mips64.cc
40
std::ostream& operator<<(std::ostream& os, const
FpuRegister
& rhs) {
44
os << "
FpuRegister
[" << static_cast<int>(rhs) << "]";
registers_mips64.h
71
enum
FpuRegister
{
108
std::ostream& operator<<(std::ostream& os, const
FpuRegister
& rhs);
/art/compiler/jni/quick/mips64/
calling_convention_mips64.cc
33
static const
FpuRegister
kFpuArgumentRegisters[] = {
135
FpuRegister
arg = kFpuArgumentRegisters[reg_index];
/art/compiler/optimizing/
code_generator_mips64.cc
[
all
...]
intrinsics_mips64.cc
64
FpuRegister
trg_reg = trg.AsFpuRegister<
FpuRegister
>();
150
FpuRegister
in = locations->InAt(0).AsFpuRegister<
FpuRegister
>();
188
FpuRegister
out = locations->Out().AsFpuRegister<
FpuRegister
>();
475
FpuRegister
in = locations->InAt(0).AsFpuRegister<
FpuRegister
>();
476
FpuRegister
out = locations->Out().AsFpuRegister<
FpuRegister
>();
[
all
...]
code_generator_mips64.h
36
static constexpr
FpuRegister
kParameterFpuRegisters[] =
48
static constexpr
FpuRegister
kRuntimeParameterFpuRegisters[] =
56
static constexpr
FpuRegister
kFpuCalleeSaves[] =
62
class InvokeDexCallingConvention : public CallingConvention<GpuRegister,
FpuRegister
> {
90
class InvokeRuntimeCallingConvention : public CallingConvention<GpuRegister,
FpuRegister
> {
Completed in 1441 milliseconds