| /art/compiler/utils/mips/ |
| assembler_mips32r6_test.cc | 504 TEST_F(AssemblerMIPS32r6Test, LoadDFromOffset) {
505 __ LoadDFromOffset(mips::F0, mips::A0, -0x8000);
506 __ LoadDFromOffset(mips::F0, mips::A0, +0);
507 __ LoadDFromOffset(mips::F0, mips::A0, +0x7FF8);
508 __ LoadDFromOffset(mips::F0, mips::A0, +0x7FFB);
509 __ LoadDFromOffset(mips::F0, mips::A0, +0x7FFC);
510 __ LoadDFromOffset(mips::F0, mips::A0, +0x7FFF);
511 __ LoadDFromOffset(mips::F0, mips::A0, -0xFFF0);
512 __ LoadDFromOffset(mips::F0, mips::A0, -0x8008);
513 __ LoadDFromOffset(mips::F0, mips::A0, -0x8001)
[all...] |
| assembler_mips_test.cc | [all...] |
| assembler_mips.h | 626 void LoadDFromOffset(FRegister reg,
720 void LoadDFromOffset(FRegister reg, Register base, int32_t offset);
[all...] |
| assembler_mips.cc | [all...] |
| /art/compiler/utils/arm/ |
| assembler_arm_vixl.h | 203 void LoadDFromOffset(vixl32::DRegister reg, vixl32::Register base, int32_t offset);
|
| assembler_arm_vixl.cc | 353 void ArmVIXLAssembler::LoadDFromOffset(vixl32::DRegister reg,
|
| jni_macro_assembler_arm.cc | 305 assembler->LoadDFromOffset(dst.AsDRegister(), src_register, src_offset);
|
| assembler_arm.h | 745 virtual void LoadDFromOffset(DRegister reg,
[all...] |
| assembler_thumb2.h | 347 void LoadDFromOffset(DRegister reg,
[all...] |
| assembler_thumb2.cc | [all...] |
| /art/compiler/utils/arm64/ |
| jni_macro_assembler_arm64.h | 221 void LoadDFromOffset(DRegister dest, XRegister base, int32_t offset);
|
| jni_macro_assembler_arm64.cc | 250 void Arm64JNIMacroAssembler::LoadDFromOffset(DRegister dest, XRegister base, int32_t offset) {
|
| /art/compiler/optimizing/ |
| code_generator_arm.cc | 150 __ LoadDFromOffset(d_reg, SP, stack_offset);
[all...] |
| code_generator_mips.cc | [all...] |
| code_generator_arm_vixl.cc | [all...] |
