| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelDAGToDAG.cpp | 63 static bool isCPLoad(const LoadSDNode *N);
64 static bool isConstantLoad(const LoadSDNode *N, int cbID);
65 static bool isGlobalLoad(const LoadSDNode *N);
66 static bool isPrivateLoad(const LoadSDNode *N);
67 static bool isLocalLoad(const LoadSDNode *N);
68 static bool isRegionLoad(const LoadSDNode *N);
243 bool AMDGPUDAGToDAGISel::isConstantLoad(const LoadSDNode *N, int cbID) {
261 bool AMDGPUDAGToDAGISel::isGlobalLoad(const LoadSDNode *N) {
265 bool AMDGPUDAGToDAGISel::isLocalLoad(const LoadSDNode *N) {
269 bool AMDGPUDAGToDAGISel::isRegionLoad(const LoadSDNode *N)
[all...] |
| SIISelLowering.cpp | 335 LoadSDNode *Ptr = dyn_cast<LoadSDNode>(Op);
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelDAGToDAG.cpp | 299 static bool isValidIndexedLoad(const LoadSDNode *LD) {
327 LoadSDNode *LD = cast<LoadSDNode>(N);
356 LoadSDNode *LD = cast<LoadSDNode>(N1);
|
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| MSP430ISelDAGToDAG.cpp | 302 static bool isValidIndexedLoad(const LoadSDNode *LD) {
330 LoadSDNode *LD = cast<LoadSDNode>(N);
359 LoadSDNode *LD = cast<LoadSDNode>(N1);
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| SelectionDAGNodes.h | [all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | 686 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
[all...] |
| LegalizeTypes.h | 240 SDValue PromoteIntRes_LOAD(LoadSDNode *N);
314 void ExpandIntRes_LOAD (LoadSDNode *N, SDValue &Lo, SDValue &Hi);
521 SDValue ScalarizeVecRes_LOAD(LoadSDNode *N);
565 void SplitVecRes_LOAD(LoadSDNode *N, SDValue &Lo, SDValue &Hi);
648 LoadSDNode *LD);
656 LoadSDNode *LD, ISD::LoadExtType ExtType);
[all...] |
| LegalizeTypesGeneric.cpp | 208 LoadSDNode *LD = cast<LoadSDNode>(N);
|
| LegalizeVectorTypes.cpp | 59 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
185 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
433 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
701 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
[all...] |
| SelectionDAG.cpp | 413 const LoadSDNode *LD = cast<LoadSDNode>(N);
[all...] |
| LegalizeFloatTypes.cpp | 473 LoadSDNode *L = cast<LoadSDNode>(N);
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAGNodes.h | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelDAGToDAG.cpp | 93 bool tryLoadOfLoadIntrinsic(LoadSDNode *N);
95 void SelectBaseOffsetLoad(LoadSDNode *LD, SDLoc dl);
96 void SelectIndexedLoad(LoadSDNode *LD, const SDLoc &dl);
240 void HexagonDAGToDAGISel::SelectIndexedLoad(LoadSDNode *LD, const SDLoc &dl) {
446 bool HexagonDAGToDAGISel::tryLoadOfLoadIntrinsic(LoadSDNode *N) {
519 LoadSDNode *LD = cast<LoadSDNode>(N);
670 LoadSDNode *LD = cast<LoadSDNode>(MulOp0.getNode());
699 LoadSDNode *LD = cast<LoadSDNode>(MulOp1.getNode())
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | 193 SDValue SplitIndexingFromLoad(LoadSDNode *LD);
205 SDNode *EVE, EVT InVecVT, SDValue EltNo, LoadSDNode *OriginalLoad);
440 bool isAndLoadExtLoad(ConstantSDNode *AndC, LoadSDNode *LoadN,
[all...] |
| LegalizeTypes.h | 261 SDValue PromoteIntRes_LOAD(LoadSDNode *N);
337 void ExpandIntRes_LOAD (LoadSDNode *N, SDValue &Lo, SDValue &Hi);
610 SDValue ScalarizeVecRes_LOAD(LoadSDNode *N);
661 void SplitVecRes_LOAD(LoadSDNode *N, SDValue &Lo, SDValue &Hi);
[all...] |
| LegalizeVectorOps.cpp | 203 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode());
495 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode());
[all...] |
| LegalizeTypesGeneric.cpp | 260 LoadSDNode *LD = cast<LoadSDNode>(N);
|
| SelectionDAGDumper.cpp | 496 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
|
| SelectionDAG.cpp | 450 const LoadSDNode *LD = cast<LoadSDNode>(N);
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelDAGToDAG.cpp | 321 bool canUseBlockOperation(StoreSDNode *Store, LoadSDNode *Load) const;
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 196 bool MatchLoadInAddress(LoadSDNode *N, X86ISelAddressMode &AM);
401 LoadSDNode *LD = dyn_cast<LoadSDNode>(Callee.getNode());
585 bool X86DAGToDAGISel::MatchLoadInAddress(LoadSDNode *N, X86ISelAddressMode &AM){
770 if (!MatchLoadInAddress(cast<LoadSDNode>(N), AM))
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 203 bool matchLoadInAddress(LoadSDNode *N, X86ISelAddressMode &AM);
506 LoadSDNode *LD = dyn_cast<LoadSDNode>(Callee.getNode());
711 bool X86DAGToDAGISel::matchLoadInAddress(LoadSDNode *N, X86ISelAddressMode &AM){
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | 728 ? cast<LoadSDNode>(Op)->getAddressingMode()
764 ? cast<LoadSDNode>(Op)->getAddressingMode()
784 ? cast<LoadSDNode>(Op)->getAddressingMode()
857 ? cast<LoadSDNode>(Op)->getAddressingMode()
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 421 LoadSDNode *LD = cast<LoadSDNode>(Op);
[all...] |
