| /external/mesa3d/src/gallium/tests/graw/fragment-shader/ |
| frag-mad-immx.sh | 8 MAD OUT[0], IN[0], IMMX[0], IMMX[1]
|
| frag-mad.sh | 9 MAD OUT[0], IN[0], IMM[0], IMM[1]
|
| /external/mesa3d/src/gallium/tests/graw/vertex-shader/ |
| vert-cb-2d.sh | 10 MAD OUT[1], IN[1], CONST[1][2], CONST[1][1]
|
| vert-mad.sh | 11 MAD OUT[0], IN[0], IMM[0], IMM[1]
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.cpp | 121 return DAG.getNode(AMDGPUISD::MAD, DL, VT, Op.getOperand(1),
173 return DAG.getNode(AMDGPUISD::MAD, DL, VT, Op.getOperand(1),
335 NODE_NAME_CASE(MAD);
|
| AMDGPUISelLowering.h | 107 MAD, // 32bit Fused Multiply Add instruction
|
| AMDILISelLowering.cpp | 541 // float fr = mad(fqneg, fb, fa);
542 SDValue fr = DAG.getNode(AMDGPUISD::MAD, DL, FLTTY, fqneg, fb, fa);
|
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_opcode_tmp.h | 59 OP13(MAD)
|
| /external/swiftshader/src/Shader/ |
| PixelPipeline.hpp | 77 void MAD(Vector4s &dst, Vector4s &src0, Vector4s &src1, Vector4s &src2);
|
| PixelPipeline.cpp | 123 case Shader::OPCODE_MAD: MAD(d, s0, s1, s2); break;
[all...] |
| /external/mesa3d/src/mesa/program/ |
| program_lexer.l | 213 MAD{sz}{cc}{sat} { return_opcode( 1, TRI_OP, MAD, 3); }
|
| /external/mesa3d/src/gallium/state_trackers/d3d1x/gd3d1x/ |
| sm4_to_tgsi.cpp | 263 OP3(MAD);
548 OP3_(IMAD, MAD);
558 OP3_(UMAD, MAD);
|
| /external/mesa3d/src/gallium/drivers/nv30/ |
| nvfx_fragprog.c | 649 nvfx_fp_emit(fpc, arith(0, MAD, tmp.reg, mask, neg(src[0]), src[2], src[2]));
650 nvfx_fp_emit(fpc, arith(sat, MAD, dst, mask, src[0], src[1], tmp));
654 nvfx_fp_emit(fpc, arith(sat, MAD, dst, mask, src[0], src[1], src[2]));
693 nvfx_fp_emit(fpc, arith(sat, MAD, dst, mask, swz(tmp, Z, Z, Z, Z), src[0], neg(src[1])));
804 nvfx_fp_emit(fpc, arith(sat, MAD, dst, (mask & ~NVFX_FP_MASK_W), swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), neg(tmp)));
[all...] |
| nvfx_vertprog.c | 621 nvfx_vp_emit(vpc, arith(0, VEC, MAD, tmp.reg, mask, neg(src[0]), src[2], src[2]));
622 nvfx_vp_emit(vpc, arith(sat, VEC, MAD, dst, mask, src[0], src[1], tmp));
625 nvfx_vp_emit(vpc, arith(sat, VEC, MAD, dst, mask, src[0], src[1], src[2]));
702 nvfx_vp_emit(vpc, arith(sat, VEC, MAD, dst, (mask & ~NVFX_VP_MASK_W), swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), neg(tmp)));
[all...] |
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_from_tgsi.cpp | 465 NV50_IR_OPCODE_CASE(MAD, MAD);
535 NV50_IR_OPCODE_CASE(UMAD, MAD);
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_eu.h | 877 ALU3(MAD)
|
| brw_eu_emit.c | 904 ALU3(MAD)
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| r200_vertprog.c | 85 OPN(MAD, 3),
901 mad r0, -r2.yzxw, r1.zxyw, r0
[all...] |
| /external/mesa3d/src/mesa/state_tracker/ |
| st_glsl_to_tgsi.cpp | 659 case2fi(MAD, UMAD);
[all...] |
