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  /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/PciEmulation/
PciEmulation.c 581 Private->RootBridge.MemoryStart = USB_EHCI_HCCAPBASE; // Get the USB capability register base
585 CapabilityLength = MmioRead8(Private->RootBridge.MemoryStart);
586 PhysicalPorts = (MmioRead32 (Private->RootBridge.MemoryStart + 0x4)) & 0x0000000F;
595 MmioOr32 ((Private->RootBridge.MemoryStart + CapabilityLength + HOST_CONTROLLER_OPERATION_REG_SIZE + 4*Count), 0x00001000);
612 Private->ConfigSpace->Device.Bar[0] = Private->RootBridge.MemoryStart;
PciRootBridgeIo.c 23 if ((Address >= Private->MemoryStart) && (Address < (Private->MemoryStart + Private->MemorySize))) {
PciEmulation.h 79 UINT32 MemoryStart;
  /device/linaro/bootloader/edk2/Omap35xxPkg/PciEmulation/
PciEmulation.c 581 Private->RootBridge.MemoryStart = USB_EHCI_HCCAPBASE; // Get the USB capability register base
585 CapabilityLength = MmioRead8(Private->RootBridge.MemoryStart);
586 PhysicalPorts = (MmioRead32 (Private->RootBridge.MemoryStart + 0x4)) & 0x0000000F;
595 MmioOr32 ((Private->RootBridge.MemoryStart + CapabilityLength + HOST_CONTROLLER_OPERATION_REG_SIZE + 4*Count), 0x00001000);
612 Private->ConfigSpace->Device.Bar[0] = Private->RootBridge.MemoryStart;
PciRootBridgeIo.c 23 if ((Address >= Private->MemoryStart) && (Address < (Private->MemoryStart + Private->MemorySize))) {
PciEmulation.h 79 UINT32 MemoryStart;
  /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/
PciEmulation.c 510 IN PHYSICAL_ADDRESS MemoryStart,
533 Private->RootBridge.MemoryStart = MemoryStart; // Get the USB capability register base
555 Private->ConfigSpace->Device.Bar[0] = MemoryStart;
PciRootBridgeIo.c 23 if ((Address >= Private->MemoryStart) && (Address < (Private->MemoryStart + Private->MemorySize))) {
PciEmulation.h 72 UINT32 MemoryStart;

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