| /device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/PL180MciDxe/ |
| PL180Mci.c | 38 return ((MmioRead32 (MCI_POWER_CONTROL_REG) & MCI_POWER_ON) == MCI_POWER_ON);
55 return (MmioRead32 (FixedPcdGet32 (PcdPL180SysMciRegAddress)) & SYS_MCI_CARDIN);
63 return (MmioRead32 (FixedPcdGet32 (PcdPL180SysMciRegAddress)) & SYS_MCI_WPROT);
154 Status = MmioRead32 (MCI_STATUS_REG);
162 DEBUG ((EFI_D_ERROR, "MciSendCommand(CmdIndex:%d) Start bit Error! Response:0x%X Status:0x%x\n", (Cmd & 0x3F), MmioRead32 (MCI_RESPONSE0_REG), Status));
165 //DEBUG ((EFI_D_ERROR, "MciSendCommand(CmdIndex:%d) TIMEOUT! Response:0x%X Status:0x%x\n", (Cmd & 0x3F), MmioRead32 (MCI_RESPONSE0_REG), Status));
174 CmdCtrlReg = MmioRead32 (MCI_COMMAND_REG);
196 Buffer[0] = MmioRead32 (MCI_RESPONSE3_REG);
198 Buffer[0] = MmioRead32 (MCI_RESPONSE0_REG);
199 Buffer[1] = MmioRead32 (MCI_RESPONSE1_REG);
[all...] |
| /device/linaro/bootloader/edk2/ArmPkg/Drivers/ArmGic/GicV2/ |
| ArmGicV2Lib.c | 25 return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
|
| ArmGicV2SecLib.c | 39 CachedPriorityMask = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR);
44 InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
53 InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
98 ControlValue = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR);
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/Library/SP804TimerLib/ |
| SP804TimerLib.c | 37 if ((MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) == 0) {
46 if ((MmioRead32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) == 0) {
100 StartTicks = MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CURRENT_REG);
132 CurrentTicks = MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CURRENT_REG);
148 CurrentTicks = MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CURRENT_REG);
153 CurrentTicks = MmioRead32 (SP804_TIMER_METRONOME_BASE + SP804_TIMER_CURRENT_REG);
210 Value = MmioRead32 (SP804_TIMER_PERFORMANCE_BASE + SP804_TIMER_CURRENT_REG);
|
| /device/linaro/bootloader/edk2/EmbeddedPkg/Drivers/Lan9118Dxe/ |
| Lan9118DxeUtil.c | 101 while ((MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);
112 while ((MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);
115 return MmioRead32 (LAN9118_MAC_CSR_DATA);
132 while ((MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);
146 while ((MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);
242 while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
245 if (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_TIMEOUT) {
251 while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);
254 return MmioRead32 (LAN9118_E2P_DATA);
270 EepromCmd = MmioRead32 (LAN9118_E2P_CMD);
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/Hisilicon/HiKey/HiKeyDxe/ |
| InitPeripherals.c | 101 Value = MmioRead32 (PERI_CTRL_BASE + SC_PERIPH_CLKSTAT0);
109 Value = MmioRead32 (PERI_CTRL_BASE + SC_PERIPH_RSTSTAT0);
113 Value = MmioRead32 (PERI_CTRL_BASE + SC_PERIPH_CTRL4);
129 Value = MmioRead32 (PERI_CTRL_BASE + SC_PERIPH_CTRL5);
141 Data = MmioRead32 (PERI_CTRL_BASE + SC_PERIPH_CTRL5);
180 Val = MmioRead32 (PMUSSI_REG(0x1c)) | 0x40;
195 Data = MmioRead32 (AO_CTRL_BASE + SC_PW_MTCMOS_ACK_STAT0);
212 Data = MmioRead32 (PERI_CTRL_BASE + SC_PERIPH_RSTSTAT3);
|
| /device/linaro/bootloader/edk2/ArmPkg/Drivers/ArmGic/ |
| ArmGicNonSecLib.c | 35 if (MmioRead32 (GicDistributorBase + ARM_GIC_ICDDCR) & ARM_GIC_ICDDCR_ARE) {
|
| /device/linaro/bootloader/OpenPlatformPkg/Drivers/Mmc/DwSdDxe/ |
| DwSdDxe.c | 110 Value = MmioRead32 (0xf8012000 + (1 << 2));
152 Data = MmioRead32 (DWSD_CMD);
155 Data = MmioRead32 (DWSD_RINTSTS);
187 Data = MmioRead32 (DWSD_STATUS);
230 Data = MmioRead32 (DWSD_CTRL);
241 Data = MmioRead32 (DWSD_BMOD);
298 Data = MmioRead32 (DWSD_STATUS);
310 Data = MmioRead32 (DWSD_RINTSTS);
313 DEBUG ((EFI_D_ERROR, "Data:%x, ErrMask:%x, TBBCNT:%x, TCBCNT:%x, BYTCNT:%x, BLKSIZ:%x\n", Data, ErrMask, MmioRead32 (DWSD_TBBCNT), MmioRead32 (DWSD_TCBCNT), MmioRead32 (DWSD_BYTCNT), MmioRead32 (DWSD_BLKSIZ)))
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Library/Omap35xxTimerLib/ |
| TimerLib.c | 35 if ((MmioRead32 (TimerBaseAddress + GPTIMER_TCLR) & TCLR_ST_ON) == 0) {
93 StartTime = MmioRead32 (TimerCountRegister);
97 CurrentTime = MmioRead32 (TimerCountRegister);
112 return (UINT64)MmioRead32 (TimerBase(PcdGet32(PcdOmap35xxFreeTimer)) + GPTIMER_TCRR);
124 *StartValue = (UINT64)MmioRead32 (TimerBase(PcdGet32(PcdOmap35xxFreeTimer)) + GPTIMER_TLDR);
|
| /device/linaro/bootloader/edk2/Omap35xxPkg/Library/Omap35xxTimerLib/ |
| TimerLib.c | 35 if ((MmioRead32 (TimerBaseAddress + GPTIMER_TCLR) & TCLR_ST_ON) == 0) {
93 StartTime = MmioRead32 (TimerCountRegister);
97 CurrentTime = MmioRead32 (TimerCountRegister);
112 return (UINT64)MmioRead32 (TimerBase(PcdGet32(PcdOmap35xxFreeTimer)) + GPTIMER_TCRR);
124 *StartValue = (UINT64)MmioRead32 (TimerBase(PcdGet32(PcdOmap35xxFreeTimer)) + GPTIMER_TLDR);
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/SP805WatchdogDxe/ |
| SP805Watchdog.c | 45 if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_LOCKED ) {
63 if( MmioRead32(SP805_WDOG_LOCK_REG) == SP805_WDOG_LOCK_IS_UNLOCKED ) {
79 if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) != 0 ) {
96 if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) {
268 if ( (MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_INTEN) == 0 ) {
275 ReturnValue = MultU64x32( MmioRead32(SP805_WDOG_LOAD_REG), 600 );
349 if ((MmioRead32(SP805_WDOG_CONTROL_REG) & SP805_WDOG_CTRL_RESEN) == 0) {
|
| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/MMCHSDxe/ |
| MMCHS.c | 102 while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) != ICS);
120 while ((MmioRead32 (MMCHS_PSTATE) & DATI_MASK) == DATI_NOT_ALLOWED);
143 MmcStatus = MmioRead32 (MMCHS_STAT);
151 while ((MmioRead32 (MMCHS_SYSCTL) & SRC));
396 while (!(MmioRead32 (MMCHS_STAT) & CC));
406 while (!(MmioRead32 (MMCHS_STAT) & CC));
425 DEBUG ((EFI_D_INFO, "CMD0 response: %x\n", MmioRead32 (MMCHS_RSP10)));
431 DEBUG ((EFI_D_INFO, "CMD5 response: %x\n", MmioRead32 (MMCHS_RSP10)));
440 while ((MmioRead32 (MMCHS_SYSCTL) & SRC));
448 Response = MmioRead32 (MMCHS_RSP10);
[all...] |
| /device/linaro/bootloader/edk2/Omap35xxPkg/MMCHSDxe/ |
| MMCHS.c | 102 while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) != ICS);
120 while ((MmioRead32 (MMCHS_PSTATE) & DATI_MASK) == DATI_NOT_ALLOWED);
143 MmcStatus = MmioRead32 (MMCHS_STAT);
151 while ((MmioRead32 (MMCHS_SYSCTL) & SRC));
396 while (!(MmioRead32 (MMCHS_STAT) & CC));
406 while (!(MmioRead32 (MMCHS_STAT) & CC));
425 DEBUG ((EFI_D_INFO, "CMD0 response: %x\n", MmioRead32 (MMCHS_RSP10)));
431 DEBUG ((EFI_D_INFO, "CMD5 response: %x\n", MmioRead32 (MMCHS_RSP10)));
440 while ((MmioRead32 (MMCHS_SYSCTL) & SRC));
448 Response = MmioRead32 (MMCHS_RSP10);
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/MmcHostDxe/ |
| MmcHostDxe.c | 242 while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) != ICS);
311 //return (MmioRead32 (GPIO1_BASE + GPIO_DATAIN) & BIT23) == BIT23;
351 while ((MmioRead32 (MMCHS_PSTATE) & DATI_MASK) == DATI_NOT_ALLOWED);
375 MmcStatus = MmioRead32 (MMCHS_STAT);
383 while ((MmioRead32 (MMCHS_SYSCTL) & SRC));
432 while ((MmioRead32 (MMCHS_SYSSTATUS) & RESETDONE_MASK) != RESETDONE);
437 while ((MmioRead32 (MMCHS_SYSCTL) & SRA) != 0x0);
461 while ((MmioRead32 (MMCHS_HCTL) & SDBP_MASK) != SDBP_ON);
470 while (!(MmioRead32 (MMCHS_STAT) & CC));
480 while (!(MmioRead32 (MMCHS_STAT) & CC));
[all...] |
| /device/linaro/bootloader/edk2/Omap35xxPkg/MmcHostDxe/ |
| MmcHostDxe.c | 242 while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) != ICS);
311 //return (MmioRead32 (GPIO1_BASE + GPIO_DATAIN) & BIT23) == BIT23;
351 while ((MmioRead32 (MMCHS_PSTATE) & DATI_MASK) == DATI_NOT_ALLOWED);
375 MmcStatus = MmioRead32 (MMCHS_STAT);
383 while ((MmioRead32 (MMCHS_SYSCTL) & SRC));
432 while ((MmioRead32 (MMCHS_SYSSTATUS) & RESETDONE_MASK) != RESETDONE);
437 while ((MmioRead32 (MMCHS_SYSCTL) & SRA) != 0x0);
461 while ((MmioRead32 (MMCHS_HCTL) & SDBP_MASK) != SDBP_ON);
470 while (!(MmioRead32 (MMCHS_STAT) & CC));
480 while (!(MmioRead32 (MMCHS_STAT) & CC));
[all...] |
| /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb/ |
| DebugCommunicationLibUsb.c | 301 while ((MmioRead32((UINTN)&DebugPortRegister->ControlStatus) & (UINT32)BIT16) == 0) {
302 if ((MmioRead32((UINTN)&DebugPortRegister->ControlStatus) & (USB_DEBUG_PORT_OWNER | USB_DEBUG_PORT_IN_USE | USB_DEBUG_PORT_ENABLE))
316 if ((MmioRead32((UINTN)&DebugPortRegister->ControlStatus)) & BIT6) {
323 if (((MmioRead32((UINTN)&DebugPortRegister->ControlStatus)) & 0xF) > USB_DEBUG_PORT_MAX_PACKET_SIZE) {
327 *Length = (UINT8)(MmioRead32((UINTN)&DebugPortRegister->ControlStatus) & 0xF);
402 while ((MmioRead32((UINTN)&DebugPortRegister->ControlStatus) & BIT16) == 0) {
403 if ((MmioRead32((UINTN)&DebugPortRegister->ControlStatus) & (USB_DEBUG_PORT_OWNER | USB_DEBUG_PORT_IN_USE | USB_DEBUG_PORT_ENABLE))
417 if ((MmioRead32((UINTN)&DebugPortRegister->ControlStatus)) & BIT6) {
424 if (((MmioRead32((UINTN)&DebugPortRegister->ControlStatus)) & 0xF) > USB_DEBUG_PORT_MAX_PACKET_SIZE) {
563 if ((MmioRead32((UINTN)&UsbDebugPortRegister->ControlStatus) & (USB_DEBUG_PORT_OWNER | USB_DEBUG_PORT_ENABLE | USB (…)
[all...] |
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/I2CLibDxe/ |
| I2CLib.c | 132 if (MmioRead32 (PciMmBase) != 0xFFFFFFFF) {
133 if((MmioRead32 (PciMmBase+R_PCH_LPSS_I2C_STSCMD)& B_PCH_LPSS_I2C_STSCMD_MSE)) {
137 mLpssPciDeviceList[I2cControllerIndex + 1].Bar0=MmioRead32 (PciMmBase+R_PCH_LPSS_I2C_BAR);
138 mLpssPciDeviceList[I2cControllerIndex + 1].Bar1=MmioRead32 (PciMmBase+R_PCH_LPSS_I2C_BAR1);
188 PmcBase = MmioRead32 (PCI_D31F0_REG_BASE + R_PCH_LPC_PMC_BASE) & B_PCH_LPC_PMC_BASE_BAR;
189 if(MmioRead32(PmcBase+R_PCH_PMC_FUNC_DIS)&PmcFunctionDsiable[I2cControllerIndex]) {
194 DEBUG ((EFI_D_INFO, "ProgramPciLpssI2C()------------I2cControllerIndex=%x,PMC=%x\n",I2cControllerIndex,MmioRead32(PmcBase+R_PCH_PMC_FUNC_DIS)));
210 if (MmioRead32 (PciMmBase) != 0xFFFFFFFF) {
211 if((MmioRead32 (PciMmBase+R_PCH_LPSS_I2C_STSCMD)& B_PCH_LPSS_I2C_STSCMD_MSE)) {
215 mLpssPciDeviceList[I2cControllerIndex+1].Bar0=MmioRead32 (PciMmBase+R_PCH_LPSS_I2C_BAR);
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Drivers/Mmc/DwEmmcDxe/ |
| DwEmmcDxe.c | 128 Data = MmioRead32 (DWEMMC_CMD);
131 Data = MmioRead32 (DWEMMC_RINTSTS);
162 Data = MmioRead32 (DWEMMC_STATUS);
203 Data = MmioRead32 (DWEMMC_CTRL);
219 Data = MmioRead32 (DWEMMC_BMOD);
283 Data = MmioRead32 (DWEMMC_STATUS);
295 Data = MmioRead32 (DWEMMC_RINTSTS);
406 Buffer[0] = MmioRead32 (DWEMMC_RESP0);
408 Buffer[0] = MmioRead32 (DWEMMC_RESP0);
409 Buffer[1] = MmioRead32 (DWEMMC_RESP1)
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/TexasInstruments/BeagleBoard/Library/BeagleBoardLib/ |
| BeagleBoard.c | 47 OldPinDir = MmioRead32 (GPIO6_BASE + GPIO_OE);
49 Revision = MmioRead32 (GPIO6_BASE + GPIO_DATAIN);
|
| /device/linaro/bootloader/edk2/BeagleBoardPkg/Library/BeagleBoardLib/ |
| BeagleBoard.c | 47 OldPinDir = MmioRead32 (GPIO6_BASE + GPIO_OE);
49 Revision = MmioRead32 (GPIO6_BASE + GPIO_DATAIN);
|
| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Library/PlatformHelperLib/ |
| PlatformHelperLib.c | 53 if (MmioRead32 (PchRootComplexBar + R_QNC_RCRB_SPIPBR0) == 0) {
56 if (MmioRead32 (PchRootComplexBar + R_QNC_RCRB_SPIPBR1) == 0) {
59 if (MmioRead32 (PchRootComplexBar + R_QNC_RCRB_SPIPBR2) == 0) {
78 if (RegVal == MmioRead32 (PchRootComplexBar + Offset)) {
143 if (MmioRead32 (PchRootComplexBar + R_QNC_RCRB_SPIPBR0) != 0) {
147 if (MmioRead32 (PchRootComplexBar + R_QNC_RCRB_SPIPBR0) != 0) {
151 if (MmioRead32 (PchRootComplexBar + R_QNC_RCRB_SPIPBR0) != 0) {
186 RegVal = MmioRead32 (PchRootComplexBar + Offset);
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/PL011Uart/ |
| PL011Uart.c | 58 if (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) > PL011_VER_R1P4)
210 Bits = MmioRead32 (UartBase + UARTCR);
281 FlagRegister = MmioRead32 (UartBase + UARTFR);
282 ControlRegister = MmioRead32 (UartBase + UARTCR);
352 while ((MmioRead32 (UartBase + UARTFR) & UART_TX_FULL_FLAG_MASK));
381 while ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) != 0);
402 return ((MmioRead32 (UartBase + UARTFR) & UART_RX_EMPTY_FLAG_MASK) == 0);
|
| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Library/OmapDmaLib/ |
| OmapDmaLib.c | 58 RegVal = MmioRead32 (DMA4_CSDP (Channel));
89 RegVal = MmioRead32 (DMA4_CCR (Channel));
158 Reg = MmioRead32 (DMA4_CSR(Channel));
|
| /device/linaro/bootloader/edk2/Omap35xxPkg/Library/OmapDmaLib/ |
| OmapDmaLib.c | 58 RegVal = MmioRead32 (DMA4_CSDP (Channel));
89 RegVal = MmioRead32 (DMA4_CCR (Channel));
158 Reg = MmioRead32 (DMA4_CSR(Channel));
|
| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/SouthCluster/Include/ |
| PchAccess.h | 56 MmioRead32 (MmPciAddress (0, \
67 MmioRead32 ( \
181 #define PchLpcPciCfg32(Register) MmioRead32 (MmPciAddress (0, DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_LPC, 0, Register))
284 #define PchSataPciCfg32(Register) MmioRead32 (MmPciAddress (0, DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_SATA, PCI_FUNCTION_NUMBER_PCH_SATA, Register))
387 #define PchMmRcrb32(Register) MmioRead32 (PCH_RCRB_BASE + Register)
435 (Dbuff) = MmioRead32 ((UINTN) (PatchPcdGet64 (PcdPciExpressBaseAddress) + MC_MDR)); \
442 (Dbuff) = MmioRead32 ((UINTN) (PatchPcdGet64 (PcdPciExpressBaseAddress) + MC_MDR)); \
452 (Dbuff) = MmioRead32 ((UINTN) (PatchPcdGet64 (PcdPciExpressBaseAddress) + MC_MDR)); \
462 (Dbuff) = MmioRead32 ((UINTN) (PatchPcdGet64 (PcdPciExpressBaseAddress) + MC_MDR)); \
496 (Dbuff) = (UINT32) MmioRead32 ((UINTN) (PatchPcdGet64 (PcdPciExpressBaseAddress) + MC_MDR)); \
[all...] |
