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    Searched refs:NVIC_STIR_INTID_Pos (Results 1 - 4 of 4) sorted by null

/device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/
core_cm3.h	334 #define NVIC_STIR_INTID_Pos 0 /*!< STIR: INTLINESNUM Position */ 335 #define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos) /*!< STIR: INTLINESNUM Mask */     [all...]
core_cm4.h	381 #define NVIC_STIR_INTID_Pos 0 /*!< STIR: INTLINESNUM Position */ 382 #define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos) /*!< STIR: INTLINESNUM Mask */     [all...]
core_sc300.h	334 #define NVIC_STIR_INTID_Pos 0 /*!< STIR: INTLINESNUM Position */ 335 #define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos) /*!< STIR: INTLINESNUM Mask */     [all...]
core_cm7.h	396 #define NVIC_STIR_INTID_Pos 0 /*!< STIR: INTLINESNUM Position */ 397 #define NVIC_STIR_INTID_Msk (0x1FFUL << NVIC_STIR_INTID_Pos) /*!< STIR: INTLINESNUM Mask */     [all...]

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