| /external/llvm/lib/Target/PowerPC/ |
| PPCVSXCopy.cpp | 115 unsigned NewVReg = MRI.createVirtualRegister(SrcRC);
117 TII->get(TargetOpcode::SUBREG_TO_REG), NewVReg)
125 SrcMO.setReg(NewVReg);
141 unsigned NewVReg = MRI.createVirtualRegister(DstRC);
143 TII->get(TargetOpcode::COPY), NewVReg)
147 SrcMO.setReg(NewVReg);
|
| PPCVSXSwapRemoval.cpp | 887 unsigned NewVReg = MRI->createVirtualRegister(DstRC);
889 MI->getOperand(0).setReg(NewVReg);
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| LiveIntervalAnalysis.cpp | [all...] |
| ProcessImplicitDefs.cpp | 277 unsigned NewVReg = MRI->createVirtualRegister(RC);
282 RRMO.setReg(NewVReg);
285 // Only the first operand of NewVReg is marked kill.
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 300 unsigned NewVReg = MRI->createVirtualRegister(DstRC);
302 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg);
303 VReg = NewVReg;
550 unsigned NewVReg = MRI->createVirtualRegister(DstRC);
552 NewVReg).addReg(VReg);
555 bool isNew = VRBaseMap.insert(std::make_pair(Op, NewVReg)).second;
567 unsigned NewVReg = MRI->createVirtualRegister(RC);
569 TII->get(TargetOpcode::REG_SEQUENCE), NewVReg);
583 MRI->setRegClass(NewVReg, SRC);
593 bool isNew = VRBaseMap.insert(std::make_pair(Op, NewVReg)).second
[all...] |
| /external/llvm/lib/CodeGen/GlobalISel/ |
| RegisterBankInfo.cpp | 534 // end of the list of NewVReg.
568 for (unsigned &NewVReg : NewVRegsForOpIdx) {
570 assert(NewVReg == 0 && "Register has already been created");
571 NewVReg = MRI.createGenericVirtualRegister(PartMap->Length);
572 MRI.setRegBank(NewVReg, *PartMap->RegBank);
579 unsigned NewVReg) {
588 NewVRegs[OpToNewVRegIdx[OpIdx] + PartialMapIdx] = NewVReg;
|
| /external/llvm/lib/CodeGen/ |
| InlineSpiller.cpp | 557 unsigned NewVReg = Edit->createFrom(Original);
561 Edit->rematerializeAt(*MI.getParent(), MI, NewVReg, RM, TRI);
570 MO.setReg(NewVReg);
832 void InlineSpiller::insertReload(unsigned NewVReg,
838 TII.loadRegFromStackSlot(MBB, MI, NewVReg, StackSlot,
839 MRI.getRegClass(NewVReg), &TRI);
844 NewVReg));
848 /// insertSpill - Insert a spill of NewVReg after MI.
849 void InlineSpiller::insertSpill(unsigned NewVReg, bool isKill,
854 TII.storeRegToStackSlot(MBB, std::next(MI), NewVReg, isKill, StackSlot
[all...] |
| RenameIndependentSubregs.cpp | 142 unsigned NewVReg = MRI->createVirtualRegister(RegClass);
143 LiveInterval &NewLI = LIS->createEmptyInterval(NewVReg);
145 DEBUG(dbgs() << ' ' << PrintReg(NewVReg));
|
| LiveIntervalAnalysis.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 339 unsigned NewVReg = MRI->createVirtualRegister(DstRC);
341 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg);
342 VReg = NewVReg;
596 unsigned NewVReg = MRI->createVirtualRegister(DstRC);
598 NewVReg).addReg(VReg);
601 bool isNew = VRBaseMap.insert(std::make_pair(Op, NewVReg)).second;
613 unsigned NewVReg = MRI->createVirtualRegister(TRI->getAllocatableClass(RC));
615 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II, NewVReg);
632 MRI->setRegClass(NewVReg, SRC);
643 bool isNew = VRBaseMap.insert(std::make_pair(Op, NewVReg)).second
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| LiveIntervalAnalysis.h | 432 MachineInstr *MI, unsigned NewVReg, VirtRegMap &vrm);
444 unsigned &NewVReg, unsigned ImpUse, bool &HasDef, bool &HasUse,
|
| /external/llvm/include/llvm/CodeGen/GlobalISel/ |
| RegisterBankInfo.h | 255 /// the OpIdx-th operand to \p NewVReg.
264 void setVRegs(unsigned OpIdx, unsigned PartialMapIdx, unsigned NewVReg);
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.cpp | 303 unsigned *NewVReg = nullptr) {
361 if (NewVReg)
362 *NewVReg = DefMI->getOperand(SrcOpNum).getReg();
513 unsigned NewVReg = 0;
514 unsigned FoldedOpc = canFoldIntoCSel(MRI, TrueReg, &NewVReg);
521 FoldedOpc = canFoldIntoCSel(MRI, FalseReg, &NewVReg);
525 FalseReg = NewVReg;
527 // The extends the live range of NewVReg.
528 MRI.clearKillFlags(NewVReg);
[all...] |
