/external/webp/src/dsp/ |
mips_macro.h | 51 #define MUL_SHIFT_SUM(O0, O1, O2, O3, O4, O5, O6, O7, \ 61 "mul %[" #O7 "], %[" #I3 "], %[kC1] \n\t" \ 69 "sra %[" #O7 "], %[" #O7 "], 16 \n\t" \ 97 #define SHIFT_R_SUM_X2(O0, O1, O2, O3, O4, O5, O6, O7, \ 106 "subq.ph %[" #O7 "], %[" #I3 "], %[" #I7 "] \n\t" \ 114 "shra.ph %[" #O7 "], %[" #O7 "], 3 \n\t" 141 #define CONVERT_2_BYTES_TO_HALF(O0, O1, O2, O3, O4, O5, O6, O7, \ 150 "preceu.ph.qbl %[" #O7 "], %[" #I3 "] \n\t [all...] |
enc_mips_dsp_r2.c | 28 #define ADD_SUB_HALVES_X4(O0, O1, O2, O3, O4, O5, O6, O7, \ 37 "subq.ph %[" #O7 "], %[" #I6 "], %[" #I7 "] \n\t" [all...] |
/external/ltp/testcases/kernel/syscalls/ptrace/ |
simple_tracer.c | 94 #define O7 u_regs[14] 109 decode(O7);
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/external/llvm/lib/Target/Sparc/InstPrinter/ |
SparcInstPrinter.cpp | 73 case SP::O7: O << "\tretl"; return true; 78 case SP::O7: // call $addr
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/external/llvm/lib/Target/Sparc/MCTargetDesc/ |
SparcMCTargetDesc.cpp | 61 InitSparcMCRegisterInfo(X, SP::O7);
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/external/llvm/lib/Target/Sparc/ |
SparcAsmPrinter.cpp | 180 assert(MO.getReg() != SP::O7 && 181 "%o7 is assigned as destination for getpcx!"); 215 // Use register %o7 to load the lower 32 bits. 216 MCOperand RegO7 = MCOperand::createReg(SP::O7); 230 MCOperand RegO7 = MCOperand::createReg(SP::O7); 238 // add <MO>, %o7, <MO>
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SparcRegisterInfo.cpp | 37 SparcRegisterInfo::SparcRegisterInfo() : SparcGenRegisterInfo(SP::O7) {}
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DelaySlotFiller.cpp | 296 // Call defines o7, which is visible to the instruction in delay slot. 297 RegDefs.insert(SP::O7);
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SparcFrameLowering.cpp | 172 unsigned regOutRA = RegInfo.getDwarfRegNum(SP::O7, true);
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SparcISelLowering.cpp | 187 static_assert(SP::I0 + 7 == SP::I7 && SP::O0 + 7 == SP::O7, [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
SparcAsmPrinter.cpp | 148 assert(MO.getReg() != SP::O7 && 149 "%o7 is assigned as destination for getpcx!"); 168 O << "\tadd\t" << operand << ", %o7, " << operand << '\n';
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/toolchain/binutils/binutils-2.25/gas/config/ |
tc-sparc.c | [all...] |
/external/llvm/lib/Target/Sparc/AsmParser/ |
SparcAsmParser.cpp | 105 Sparc::O4, Sparc::O5, Sparc::O6, Sparc::O7, 375 else if (Reg >= Sparc::O0 && Reg <= Sparc::O7) [all...] |
/toolchain/binutils/binutils-2.25/bfd/ |
elfxx-sparc.c | [all...] |
/external/llvm/lib/Target/Sparc/Disassembler/ |
SparcDisassembler.cpp | 71 SP::O4, SP::O5, SP::O6, SP::O7,
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/prebuilts/go/darwin-x86/src/crypto/tls/ |
handshake_server_test.go | 1019 AoGAEJZ03q4uuMb7b26WSQsOMeDsftdatT747LGgs3pNRkMJvTb/O7/qJjxoG+Mc [all...] |
/prebuilts/go/linux-x86/src/crypto/tls/ |
handshake_server_test.go | 1019 AoGAEJZ03q4uuMb7b26WSQsOMeDsftdatT747LGgs3pNRkMJvTb/O7/qJjxoG+Mc [all...] |
/external/webrtc/talk/media/testdata/ |
video.rtpdump | 18 ??};??????{?????]????0>?,ts??????????iF?'0???
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