| /external/skia/src/gpu/instanced/ |
| InstancedRenderingTypes.h | 118 struct OpInfo {
119 OpInfo() : fData(0) {}
120 explicit OpInfo(uint32_t data) : fData(data) {}
122 static bool CanCombine(const OpInfo& a, const OpInfo& b);
148 inline bool OpInfo::CanCombine(const OpInfo& a, const OpInfo& b) {
163 inline OpInfo operator|(const OpInfo& a, const OpInfo& b)
[all...] |
| InstanceProcessor.h | 25 InstanceProcessor(OpInfo, GrBuffer* paramsBuffer);
28 OpInfo opInfo() const { return fOpInfo; }
59 OpInfo fOpInfo;
|
| /external/llvm/lib/MC/ |
| MCInstrAnalysis.cpp | 16 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL)
|
| /external/swiftshader/third_party/LLVM/lib/MC/ |
| MCInstrAnalysis.cpp | 16 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL)
|
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_target.h | 139 struct OpInfo
141 OpInfo *variants;
161 inline const OpInfo& getOpInfo(const Instruction *) const;
162 inline const OpInfo& getOpInfo(const operation) const;
210 OpInfo opInfo[OP_LAST + 1];
213 const Target::OpInfo& Target::getOpInfo(const Instruction *insn) const
215 return opInfo[MIN2(insn->op, OP_LAST)];
218 const Target::OpInfo& Target::getOpInfo(const operation op) const
220 return opInfo[op]
[all...] |
| /external/skia/include/private/ |
| GrAuditTrail.h | 105 struct OpInfo {
116 void getBoundsByClientID(SkTArray<OpInfo>* outInfo, int clientID);
117 void getBoundsByOpListID(OpInfo* outInfo, int opListID);
147 void copyOutFromOpList(OpInfo* outOpInfo, int opListID);
|
| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| MCInstrDesc.h | 145 const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands
152 (OpInfo[OpNum].Constraints & (1 << Constraint))) {
154 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf;
307 if (OpInfo[i].isPredicate())
|
| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| InstrInfoEmitter.h | 48 const OperandInfoMapTy &OpInfo,
|
| AsmWriterInst.cpp | 202 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo];
204 unsigned MIOp = OpInfo.MIOperandNo;
205 Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName,
|
| FixedLenDecoderEmitter.cpp | 345 OperandInfo &OpInfo);
739 OperandInfo &OpInfo) {
740 std::string &Decoder = OpInfo.Decoder;
742 if (OpInfo.numFields() == 1) {
743 OperandInfo::iterator OI = OpInfo.begin();
749 for (OperandInfo::iterator OI = OpInfo.begin(), OE = OpInfo.end();
[all...] |
| /external/llvm/include/llvm/Bitcode/ |
| BitCodes.h | 175 void Add(const BitCodeAbbrevOp &OpInfo) {
176 OperandList.push_back(OpInfo);
|
| /external/swiftshader/third_party/LLVM/include/llvm/Bitcode/ |
| BitCodes.h | 179 void Add(const BitCodeAbbrevOp &OpInfo) {
180 OperandList.push_back(OpInfo);
|
| /external/llvm/utils/TableGen/ |
| AsmWriterInst.cpp | 169 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo];
171 unsigned MIOp = OpInfo.MIOperandNo;
172 Operands.emplace_back(OpInfo.PrinterMethodName, MIOp, Modifier);
|
| AsmMatcherEmitter.cpp | [all...] |
| FixedLenDecoderEmitter.cpp | 448 const OperandInfo &OpInfo,
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 149 const MCOperandInfo *OpInfo; // 'NumOperands' entries about operands
165 (OpInfo[OpNum].Constraints & (1 << Constraint))) {
167 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf;
540 if (OpInfo[i].isPredicate())
|
| /external/skia/src/gpu/ |
| GrAuditTrail.cpp | 87 void GrAuditTrail::copyOutFromOpList(OpInfo* outOpInfo, int opListID) {
94 OpInfo::Op& outOp = outOpInfo->fOps.push_back();
101 void GrAuditTrail::getBoundsByClientID(SkTArray<OpInfo>* outInfo, int clientID) {
114 OpInfo& outOpInfo = outInfo->push_back();
124 void GrAuditTrail::getBoundsByOpListID(OpInfo* outInfo, int opListID) {
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ |
| TargetInstrInfo.cpp | 36 short RegClass = MCID.OpInfo[OpNum].RegClass;
37 if (MCID.OpInfo[OpNum].isLookupPtrRegClass())
|
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblySetP2AlignOperands.cpp | 95 assert(MI.getDesc().OpInfo[3].OperandType ==
|
| /external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| SIMCCodeEmitter.cpp | 80 unsigned OpType = Desc.OpInfo[OpNo].OperandType;
213 int RCID = Desc.OpInfo[i].RegClass;
283 int RCID = Desc.OpInfo[OpNo].RegClass;
|
| /external/swiftshader/third_party/LLVM/lib/Transforms/Utils/ |
| AddrModeMatcher.cpp | 385 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i];
388 TLI.ComputeConstraintToUse(OpInfo, SDValue());
392 if (OpInfo.CallOperandVal == OpVal &&
393 (OpInfo.ConstraintType != TargetLowering::C_Memory ||
394 !OpInfo.isIndirect))
|
| /external/llvm/lib/Target/AMDGPU/ |
| SIInstrInfo.h | 416 const MCOperandInfo &OpInfo = get(Opcode).OpInfo[OpNo];
418 if (OpInfo.RegClass == -1) {
420 assert(OpInfo.OperandType == MCOI::OPERAND_IMMEDIATE);
424 return RI.getRegClass(OpInfo.RegClass)->getSize();
454 /// definition \p OpInfo. Note this does not attempt to validate constant bus
457 const MCOperandInfo &OpInfo,
463 const MCOperandInfo &OpInfo,
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | [all...] |
| /external/clang/lib/CodeGen/ |
| CGExprComplex.cpp | [all...] |
