| /external/llvm/lib/Target/PowerPC/ |
| PPCCCState.cpp | 18 const SmallVectorImpl<ISD::OutputArg> &Outs) {
19 for (const auto &I : Outs) {
|
| PPCCCState.h | 23 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs);
|
| /external/llvm/lib/Target/Mips/ |
| MipsCCState.h | 38 void PreAnalyzeReturnForF128(const SmallVectorImpl<ISD::OutputArg> &Outs);
43 PreAnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
73 AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
77 PreAnalyzeCallOperands(Outs, FuncArgs, CallNode);
78 CCState::AnalyzeCallOperands(Outs, Fn);
87 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
89 void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
110 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
112 PreAnalyzeReturnForF128(Outs);
113 CCState::AnalyzeReturn(Outs, Fn)
[all...] |
| MipsCCState.cpp | 87 const SmallVectorImpl<ISD::OutputArg> &Outs) {
89 for (unsigned i = 0; i < Outs.size(); ++i) {
100 const SmallVectorImpl<ISD::OutputArg> &Outs,
103 for (unsigned i = 0; i < Outs.size(); ++i) {
105 originalTypeIsF128(FuncArgs[Outs[i].OrigArgIndex].Ty, CallNode));
107 FuncArgs[Outs[i].OrigArgIndex].Ty->isFloatingPointTy());
108 CallOperandIsFixed.push_back(Outs[i].IsFixed);
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZCallingConv.h | 59 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
63 for (unsigned i = 0; i < Outs.size(); ++i)
64 ArgIsFixed.push_back(Outs[i].IsFixed);
67 for (unsigned i = 0; i < Outs.size(); ++i)
68 ArgIsShortVector.push_back(IsShortVectorType(Outs[i].ArgVT));
70 CCState::AnalyzeCallOperands(Outs, Fn);
75 void AnalyzeCallOperands(const SmallVectorImpl<MVT> &Outs,
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| CallingConvLower.cpp | 88 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
91 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
92 MVT VT = Outs[i].VT;
93 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
102 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
105 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
106 MVT VT = Outs[i].VT;
107 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
120 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
122 unsigned NumOps = Outs.size()
[all...] |
| /external/llvm/lib/CodeGen/ |
| CallingConvLower.cpp | 89 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
92 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
93 MVT VT = Outs[i].VT;
94 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
103 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
106 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
107 MVT VT = Outs[i].VT;
108 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
121 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
123 unsigned NumOps = Outs.size()
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| PTXISelLowering.h | 61 const SmallVectorImpl<ISD::OutputArg> &Outs,
70 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| PTXISelLowering.cpp | 261 const SmallVectorImpl<ISD::OutputArg> &Outs,
271 assert(Outs.size() == 0 && "Kernel must return void.");
274 assert(Outs.size() <= 1 && "Can at most return one value.");
286 assert(Outs.size() < 2 && "Device functions can return at most one value");
288 if (Outs.size() == 1) {
298 for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
299 EVT RegVT = Outs[i].VT;
348 const SmallVectorImpl<ISD::OutputArg> &Outs,
362 // The layout of the ops will be [Chain, #Ins, Ins, Callee, #Outs, Outs]
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| BlackfinISelLowering.h | 68 const SmallVectorImpl<ISD::OutputArg> &Outs,
77 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| SparcISelLowering.h | 83 const SmallVectorImpl<ISD::OutputArg> &Outs,
92 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 128 const SmallVectorImpl<ISD::OutputArg> &Outs,
157 const SmallVectorImpl<ISD::OutputArg> &Outs,
166 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 97 const SmallVectorImpl<ISD::OutputArg> &Outs,
126 const SmallVectorImpl<ISD::OutputArg> &Outs,
135 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.h | 67 const SmallVectorImpl<ISD::OutputArg> &Outs,
70 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| WebAssemblyISelLowering.cpp | 308 SmallVectorImpl<ISD::OutputArg> &Outs = CLI.Outs;
310 for (unsigned i = 0; i < Outs.size(); ++i) {
311 const ISD::OutputArg &Out = Outs[i];
435 const SmallVectorImpl<ISD::OutputArg> &Outs,
438 return Outs.size() <= 1;
443 const SmallVectorImpl<ISD::OutputArg> &Outs,
446 assert(Outs.size() <= 1 && "WebAssembly can only return up to one value");
455 for (const ISD::OutputArg &Out : Outs) {
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| AlphaISelLowering.h | 127 const SmallVectorImpl<ISD::OutputArg> &Outs,
136 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.h | 112 const SmallVectorImpl<ISD::OutputArg> &Outs,
140 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 134 const SmallVectorImpl<ISD::OutputArg> &Outs,
162 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPUISelLowering.h | 166 const SmallVectorImpl<ISD::OutputArg> &Outs,
175 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| MBlazeISelLowering.h | 138 const SmallVectorImpl<ISD::OutputArg> &Outs,
147 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsISelLowering.h | 153 const SmallVectorImpl<ISD::OutputArg> &Outs,
162 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/llvm/lib/Target/BPF/ |
| BPFISelLowering.h | 76 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.h | 155 const SmallVectorImpl<ISD::OutputArg> &Outs,
160 const SmallVectorImpl<ISD::OutputArg> &Outs,
165 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| XCoreISelLowering.h | 120 const SmallVectorImpl<ISD::OutputArg> &Outs,
181 const SmallVectorImpl<ISD::OutputArg> &Outs,
190 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCISelLowering.h | 442 const SmallVectorImpl<ISD::OutputArg> &Outs,
451 const SmallVectorImpl<ISD::OutputArg> &Outs,
457 const SmallVectorImpl<ISD::OutputArg> &Outs,
477 const SmallVectorImpl<ISD::OutputArg> &Outs,
485 const SmallVectorImpl<ISD::OutputArg> &Outs,
|
