| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciBusDxe/ |
| PciCommand.h | 152 PciOperateRegister (a, 0, PCI_COMMAND_OFFSET, EFI_GET_REGISTER, b)
164 PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_SET_REGISTER, NULL)
176 PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_ENABLE_REGISTER, NULL)
188 PciOperateRegister (a, b, PCI_COMMAND_OFFSET, EFI_DISABLE_REGISTER, NULL)
|
| /device/linaro/bootloader/edk2/DuetPkg/PciBusNoEnumerationDxe/ |
| PciCommand.c | 53 PCI_COMMAND_OFFSET,
85 PCI_COMMAND_OFFSET,
119 PCI_COMMAND_OFFSET,
129 PCI_COMMAND_OFFSET,
163 PCI_COMMAND_OFFSET,
173 PCI_COMMAND_OFFSET,
|
| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkSouthCluster/Library/IohLib/ |
| IohLib.c | 85 SaveCmdReg = PciRead16 (GipAddr + PCI_COMMAND_OFFSET);
92 PciWrite8 ( GipAddr + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE);
101 PciWrite16 (GipAddr + PCI_COMMAND_OFFSET, SaveCmdReg);
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/UfsPciHcPei/ |
| UfsPciHcPei.c | 125 PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16)~(EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));
133 PciOr16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));
|
| /device/linaro/bootloader/edk2/OvmfPkg/PlatformPei/ |
| Platform.c | 343 PmCmd = POWER_MGMT_REGISTER_PIIX4 (PCI_COMMAND_OFFSET);
349 PmCmd = POWER_MGMT_REGISTER_Q35 (PCI_COMMAND_OFFSET);
|
| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformInit/ |
| PlatformEarlyInit.c | 141 SaveCmdReg = PciRead16 (DevPcieAddr + PCI_COMMAND_OFFSET);
148 PciWrite8 ( DevPcieAddr + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE);
192 PciWrite16 (DevPcieAddr + PCI_COMMAND_OFFSET, SaveCmdReg);
988 SaveCmdReg = PciRead16 (DevPcieAddr + PCI_COMMAND_OFFSET);
995 PciWrite8 ( DevPcieAddr + PCI_COMMAND_OFFSET, EFI_PCI_COMMAND_MEMORY_SPACE);
[all...] |
| /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb/ |
| DebugCommunicationLibUsb.c | 552 PciCmd = PciRead16 (PcdGet32(PcdUsbEhciPciAddress) + PCI_COMMAND_OFFSET);
555 PciWrite16(PcdGet32(PcdUsbEhciPciAddress) + PCI_COMMAND_OFFSET, PciCmd);
609 PciCmd = PciRead16 (PcdGet32(PcdUsbEhciPciAddress) + PCI_COMMAND_OFFSET);
[all...] |
| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformSmm/ |
| Platform.c | 478 PCI_COMMAND_OFFSET
487 PCI_COMMAND_OFFSET
|
| /device/linaro/bootloader/edk2/MdeModulePkg/Library/BaseSerialPortLib16550/ |
| BaseSerialPortLib16550.c | 360 PciLibAddress + PCI_COMMAND_OFFSET,
396 PciLibAddress + PCI_COMMAND_OFFSET,
[all...] |
| /device/linaro/bootloader/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/ |
| DebugCommunicationLibUsb3Common.c | 180 PciCmd = PciRead16 (PcdGet32(PcdUsbXhciPciAddress) + PCI_COMMAND_OFFSET);
183 PciWrite16(PcdGet32(PcdUsbXhciPciAddress) + PCI_COMMAND_OFFSET, PciCmd);
|
| /device/linaro/bootloader/edk2/BaseTools/Source/C/Include/IndustryStandard/ |
| pci22.h | 293 #define PCI_COMMAND_OFFSET 0x04
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Include/IndustryStandard/ |
| pci22.h | 304 #define PCI_COMMAND_OFFSET 0x04
|
| /device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/ |
| Pci22.h | 528 #define PCI_COMMAND_OFFSET 0x04
|
| /external/syslinux/gpxe/src/include/gpxe/efi/IndustryStandard/ |
| Pci22.h | 332 #define PCI_COMMAND_OFFSET 0x04
|
