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  /prebuilts/go/darwin-x86/misc/cgo/test/issue9400/
asm_arm64.s 11 MOVD R30, R9
38 MOVD R9, R30
  /prebuilts/go/linux-x86/misc/cgo/test/issue9400/
asm_arm64.s 11 MOVD R30, R9
38 MOVD R9, R30
  /external/swiftshader/third_party/LLVM/lib/Target/Alpha/
AlphaFrameLowering.cpp 79 // adjust stack pointer: r30 -= numbytes
82 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30).addImm(NumBytes)
83 .addReg(Alpha::R30);
85 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAH), Alpha::R30)
86 .addImm(getUpper16(NumBytes)).addReg(Alpha::R30);
87 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30)
88 .addImm(getLower16(NumBytes)).addReg(Alpha::R30);
96 .addReg(Alpha::R15).addImm(0).addReg(Alpha::R30);
99 .addReg(Alpha::R30).addReg(Alpha::R30);
    [all...]
AlphaRegisterInfo.cpp 75 Reserved.set(Alpha::R30);
104 New=BuildMI(MF, Old->getDebugLoc(), TII.get(Alpha::LDA), Alpha::R30)
105 .addImm(-Amount).addReg(Alpha::R30);
108 New=BuildMI(MF, Old->getDebugLoc(), TII.get(Alpha::LDA), Alpha::R30)
109 .addImm(Amount).addReg(Alpha::R30);
148 // Add the base register of R30 (SP) or R15 (FP).
149 MI.getOperand(i + 1).ChangeToRegister(FP ? Alpha::R15 : Alpha::R30, false);
172 .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
182 return TFI->hasFP(MF) ? Alpha::R15 : Alpha::R30;
AlphaLLRP.cpp 70 if (MI->getOperand(2).getReg() == Alpha::R30) {
  /prebuilts/go/darwin-x86/src/runtime/cgo/
signal_darwin_arm64.s 55 MOVD R2, R30
asm_arm64.s 33 MOVD R30, (8*15)(RSP)
63 MOVD (8*15)(RSP), R30
  /prebuilts/go/linux-x86/src/runtime/cgo/
signal_darwin_arm64.s 55 MOVD R2, R30
asm_arm64.s 33 MOVD R30, (8*15)(RSP)
63 MOVD (8*15)(RSP), R30
  /external/linux-kselftest/tools/testing/selftests/powerpc/copyloops/asm/
ppc_asm.h 17 #define R30 r30
  /external/llvm/lib/Target/Lanai/MCTargetDesc/
LanaiBaseInfo.h 110 case Lanai::R30:
  /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/
opGen.go     [all...]
  /prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/
opGen.go     [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/
PPCBaseInfo.h 61 case R30: case X30: case F30: case V30: case CR7EQ: return 30;
  /external/llvm/lib/Target/Hexagon/
HexagonRegisterInfo.cpp 140 Reserved.set(Hexagon::R30);
228 return Hexagon::R30;
  /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/MCTargetDesc/
MBlazeBaseInfo.h 135 case MBlaze::R30 : return 30;
200 case 30 : return MBlaze::R30;
  /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
PPCFrameLowering.h 155 {PPC::R30, -8},
234 {PPC::R30, -12},
  /prebuilts/go/darwin-x86/src/cmd/asm/internal/arch/
arch.go 352 // Avoid unintentionally clobbering g using R30.
353 delete(register, "R30")
408 // Avoid unintentionally clobbering g using R30.
409 delete(register, "R30")
463 // Avoid unintentionally clobbering g using R30.
464 delete(register, "R30")
  /prebuilts/go/linux-x86/src/cmd/asm/internal/arch/
arch.go 352 // Avoid unintentionally clobbering g using R30.
353 delete(register, "R30")
408 // Avoid unintentionally clobbering g using R30.
409 delete(register, "R30")
463 // Avoid unintentionally clobbering g using R30.
464 delete(register, "R30")
  /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
MBlazeRegisterInfo.cpp 63 MBlaze::R28, MBlaze::R29, MBlaze::R30, MBlaze::R31,
  /external/llvm/lib/Target/Hexagon/MCTargetDesc/
HexagonMCTargetDesc.cpp 193 // VirtualFP = (R30 + #0).
195 MCCFIInstruction::createDefCfa(nullptr, Hexagon::R30, 0);
  /external/llvm/lib/Target/Lanai/Disassembler/
LanaiDisassembler.cpp 161 Lanai::R30, Lanai::R31};
  /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/
inst.go 93 R30
  /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/ppc64/ppc64asm/
inst.go 93 R30
  /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
SPURegisterInfo.cpp 84 case SPU::R30: return 30;

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