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  /prebuilts/go/darwin-x86/src/runtime/
tls_ppc64x.s 24 // NOTE: setg_gcc<> assume this clobbers only R31.
26 MOVB runtime·iscgo(SB), R31
27 CMP R31, $0
29 MOVD runtime·tls_g(SB), R31
30 MOVD g, 0(R13)(R31*1)
43 // NOTE: _cgo_topofstack assumes this only clobbers g (R30), and R31.
45 MOVD runtime·tls_g(SB), R31
46 MOVD 0(R13)(R31*1), g
rt0_linux_mips64x.s 35 SRLV $32, R31, RSB
asm_ppc64x.s 27 MOVD $(-64*1024), R31
28 ADD R31, R1, R3
120 MOVD LR, R31
121 MOVD R31, gobuf_pc(R3)
153 MOVD gobuf_lr(R5), R31
154 MOVD R31, LR
173 MOVD LR, R31
174 MOVD R31, (g_sched+gobuf_pc)(g)
369 MOVD $MAXSIZE, R31; \
370 CMP R3, R31; \
    [all...]
asm_mips64x.s 97 MOVV R31, gobuf_pc(R1)
127 MOVV gobuf_lr(R3), R31
144 MOVV R31, (g_sched+gobuf_pc)(g)
171 JAL (R31) // make sure this function is not leaf
261 MOVV R31, (g_sched+gobuf_pc)(g)
436 MOVV 0(R29), R31
437 ADDV $-8, R31
448 MOVV R31, (g_sched+gobuf_pc)(g)
rt0_linux_ppc64le.s 32 MOVD R31, 160(R1)
98 MOVD 160(R1), R31
  /prebuilts/go/linux-x86/src/runtime/
tls_ppc64x.s 24 // NOTE: setg_gcc<> assume this clobbers only R31.
26 MOVB runtime·iscgo(SB), R31
27 CMP R31, $0
29 MOVD runtime·tls_g(SB), R31
30 MOVD g, 0(R13)(R31*1)
43 // NOTE: _cgo_topofstack assumes this only clobbers g (R30), and R31.
45 MOVD runtime·tls_g(SB), R31
46 MOVD 0(R13)(R31*1), g
rt0_linux_mips64x.s 35 SRLV $32, R31, RSB
asm_ppc64x.s 27 MOVD $(-64*1024), R31
28 ADD R31, R1, R3
120 MOVD LR, R31
121 MOVD R31, gobuf_pc(R3)
153 MOVD gobuf_lr(R5), R31
154 MOVD R31, LR
173 MOVD LR, R31
174 MOVD R31, (g_sched+gobuf_pc)(g)
369 MOVD $MAXSIZE, R31; \
370 CMP R3, R31; \
    [all...]
asm_mips64x.s 97 MOVV R31, gobuf_pc(R1)
127 MOVV gobuf_lr(R3), R31
144 MOVV R31, (g_sched+gobuf_pc)(g)
171 JAL (R31) // make sure this function is not leaf
261 MOVV R31, (g_sched+gobuf_pc)(g)
436 MOVV 0(R29), R31
437 ADDV $-8, R31
448 MOVV R31, (g_sched+gobuf_pc)(g)
rt0_linux_ppc64le.s 32 MOVD R31, 160(R1)
98 MOVD 160(R1), R31
  /external/swiftshader/third_party/LLVM/lib/Target/Alpha/
AlphaLLRP.cpp 77 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
78 .addReg(Alpha::R31)
79 .addReg(Alpha::R31);
89 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
90 .addReg(Alpha::R31)
91 .addReg(Alpha::R31);
92 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
93 .addReg(Alpha::R31)
94 .addReg(Alpha::R31);
103 BuildMI(MBB, MI, dl, TII->get(Alpha::BISr), Alpha::R31)
    [all...]
  /prebuilts/go/darwin-x86/src/runtime/cgo/
asm_mips64x.s 34 MOVV R31, (8*14)(R29)
47 SRLV $32, R31, RSB
62 MOVV (8*14)(R29), R31
asm_mipsx.s 36 MOVW R31, (4*13)(R29)
57 MOVW (4*13)(R29), R31
asm_ppc64x.s 64 MOVD R31, -152(R1)
105 MOVD -152(R1), R31
  /prebuilts/go/linux-x86/src/runtime/cgo/
asm_mips64x.s 34 MOVV R31, (8*14)(R29)
47 SRLV $32, R31, RSB
62 MOVV (8*14)(R29), R31
asm_mipsx.s 36 MOVW R31, (4*13)(R29)
57 MOVW (4*13)(R29), R31
asm_ppc64x.s 64 MOVD R31, -152(R1)
105 MOVD -152(R1), R31
  /external/linux-kselftest/tools/testing/selftests/powerpc/copyloops/asm/
ppc_asm.h 18 #define R31 r31
  /external/llvm/lib/Target/Lanai/MCTargetDesc/
LanaiBaseInfo.h 112 case Lanai::R31:
  /external/llvm/lib/Target/Hexagon/
HexagonRegisterInfo.cpp 42 : HexagonGenRegisterInfo(Hexagon::R31) {}
141 Reserved.set(Hexagon::R31);
214 return Hexagon::R31;
  /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
PPCFrameLowering.h 121 static const SpillSlot darwinOffsets = {PPC::R31, -4};
154 {PPC::R31, -4},
233 {PPC::R31, -4},
  /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/
PPCBaseInfo.h 62 case R31: case X31: case F31: case V31: case CR7UN: return 31;
  /prebuilts/go/darwin-x86/src/cmd/compile/internal/ssa/
opGen.go     [all...]
  /prebuilts/go/linux-x86/src/cmd/compile/internal/ssa/
opGen.go     [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/MCTargetDesc/
MBlazeBaseInfo.h 136 case MBlaze::R31 : return 31;
201 case 31 : return MBlaze::R31;

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