| /art/compiler/utils/ |
| assembler_thumb_test.cc | 214 __ movs(R0, ShifterOperand(R1));
215 __ mov(R0, ShifterOperand(R1));
216 __ mov(R8, ShifterOperand(R9));
218 __ mov(R0, ShifterOperand(1));
219 __ mov(R8, ShifterOperand(9));
227 __ mov(R0, ShifterOperand(R1));
228 __ mov(R8, ShifterOperand(R9));
234 __ mov(R0, ShifterOperand(R1));
235 __ adds(R0, R1, ShifterOperand(R2));
236 __ add(R0, R1, ShifterOperand(0))
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| /art/compiler/utils/arm/ |
| assembler_arm.h | 124 class ShifterOperand {
126 ShifterOperand() : type_(kUnknown), rm_(kNoRegister), rs_(kNoRegister),
130 explicit ShifterOperand(uint32_t immed);
133 explicit ShifterOperand(Register rm) : type_(kRegister), rm_(rm), rs_(kNoRegister),
137 ShifterOperand(uint32_t rotate, uint32_t immed8) : type_(kImmediate), rm_(kNoRegister),
142 ShifterOperand(Register rm, Shift shift, uint32_t shift_imm = 0) : type_(kRegister), rm_(rm),
148 ShifterOperand(Register rm, Shift shift, Register rs) : type_(kRegister), rm_(rm),
409 virtual void and_(Register rd, Register rn, const ShifterOperand& so,
412 virtual void ands(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) {
416 virtual void eor(Register rd, Register rn, const ShifterOperand& so
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| assembler_thumb2.h | 72 virtual void and_(Register rd, Register rn, const ShifterOperand& so,
75 virtual void eor(Register rd, Register rn, const ShifterOperand& so,
78 virtual void sub(Register rd, Register rn, const ShifterOperand& so,
81 virtual void rsb(Register rd, Register rn, const ShifterOperand& so,
84 virtual void add(Register rd, Register rn, const ShifterOperand& so,
87 virtual void adc(Register rd, Register rn, const ShifterOperand& so,
90 virtual void sbc(Register rd, Register rn, const ShifterOperand& so,
93 virtual void rsc(Register rd, Register rn, const ShifterOperand& so,
96 void tst(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
98 void teq(Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE
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| assembler_arm.cc | 78 ShifterOperand::ShifterOperand(uint32_t immed)
85 uint32_t ShifterOperand::encodingArm() const {
132 uint32_t ShifterOperand::encodingThumb() const {
|
| jni_macro_assembler_arm.cc | 368 __ mov(dst.AsCoreRegister(), ShifterOperand(src.AsCoreRegister()));
390 __ mov(dst.AsRegisterPairLow(), ShifterOperand(src.AsRegisterPairLow()));
391 __ mov(dst.AsRegisterPairHigh(), ShifterOperand(src.AsRegisterPairHigh()));
393 __ mov(dst.AsRegisterPairHigh(), ShifterOperand(src.AsRegisterPairHigh()));
394 __ mov(dst.AsRegisterPairLow(), ShifterOperand(src.AsRegisterPairLow()));
488 __ cmp(in_reg.AsCoreRegister(), ShifterOperand(0));
512 __ cmp(scratch.AsCoreRegister(), ShifterOperand(0));
531 __ cmp(in_reg.AsCoreRegister(), ShifterOperand(0));
578 __ mov(tr.AsArm().AsCoreRegister(), ShifterOperand(TR));
593 __ cmp(scratch.AsCoreRegister(), ShifterOperand(0))
[all...] |
| assembler_thumb2.cc | 518 ShifterOperand* shifter_op) {
519 shifter_op->type_ = ShifterOperand::kImmediate;
542 void Thumb2Assembler::and_(Register rd, Register rn, const ShifterOperand& so,
548 void Thumb2Assembler::eor(Register rd, Register rn, const ShifterOperand& so,
554 void Thumb2Assembler::sub(Register rd, Register rn, const ShifterOperand& so,
560 void Thumb2Assembler::rsb(Register rd, Register rn, const ShifterOperand& so,
566 void Thumb2Assembler::add(Register rd, Register rn, const ShifterOperand& so,
572 void Thumb2Assembler::adc(Register rd, Register rn, const ShifterOperand& so,
578 void Thumb2Assembler::sbc(Register rd, Register rn, const ShifterOperand& so,
584 void Thumb2Assembler::rsc(Register rd, Register rn, const ShifterOperand& so
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| assembler_thumb2_test.cc | 233 __ eor(arm::R1, arm::R1, arm::ShifterOperand(arm::R0));
234 __ eor(arm::R1, arm::R0, arm::ShifterOperand(arm::R1));
235 __ eor(arm::R1, arm::R8, arm::ShifterOperand(arm::R0));
236 __ eor(arm::R8, arm::R1, arm::ShifterOperand(arm::R0));
237 __ eor(arm::R1, arm::R0, arm::ShifterOperand(arm::R8));
249 __ subs(arm::R1, arm::R0, arm::ShifterOperand(42));
250 __ sub(arm::R1, arm::R0, arm::ShifterOperand(42));
251 __ subs(arm::R1, arm::R0, arm::ShifterOperand(arm::R2, arm::ASR, 31));
252 __ sub(arm::R1, arm::R0, arm::ShifterOperand(arm::R2, arm::ASR, 31));
263 __ adds(arm::R1, arm::R0, arm::ShifterOperand(42))
[all...] |
| /art/compiler/optimizing/ |
| intrinsics_arm.cc | 68 __ add(base, array, ShifterOperand(pos.AsRegister<Register>(), LSL, element_size_shift));
90 __ add(end, base, ShifterOperand(copy_length.AsRegister<Register>(), LSL, element_size_shift));
163 __ cmp(src_curr_addr, ShifterOperand(src_stop_addr));
433 __ adds(out_reg_lo, in_reg_lo, ShifterOperand(mask));
434 __ adc(out_reg_hi, in_reg_hi, ShifterOperand(mask));
435 __ eor(out_reg_lo, mask, ShifterOperand(out_reg_lo));
436 __ eor(out_reg_hi, mask, ShifterOperand(out_reg_hi));
442 __ add(out_reg, in_reg, ShifterOperand(mask));
443 __ eor(out_reg, mask, ShifterOperand(out_reg));
471 __ cmp(op1, ShifterOperand(op2))
[all...] |
| code_generator_arm.cc | 113 __ add(IP, SP, ShifterOperand(stack_offset));
152 __ add(IP, SP, ShifterOperand(stack_offset));
399 __ mov(entry_address, ShifterOperand(temp));
428 __ add(temp, temp, ShifterOperand(PC));
484 __ mov(entry_address, ShifterOperand(temp));
506 __ add(temp, temp, ShifterOperand(PC));
[all...] |
