| /external/clang/test/CodeGenCXX/ |
| 2010-06-22-BitfieldInit.cpp | 12 } TEST3;
14 TEST3 test =
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| duplicate-mangled-name.cpp | 47 #elif TEST3
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| sections.cpp | 54 int TEST3; // should be in ".bss1"
91 //CHECK: @TEST3 = global i32 0, section ".bss1"
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| /external/clang/test/Frontend/ |
| verify.c | 66 #ifdef TEST3
67 #ifndef TEST3 // expected-note {{line_67}}
71 #elif defined(TEST3) // expected-note {{line_71}}
76 # ifndef TEST3 // expected-note {{line_76_ignored}}
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| verify3.c | 28 #ifdef TEST3
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| verify-ignore-unexpected.c | 65 #ifdef TEST3
66 // expected-error {{test3}}
69 // CHECK-EXP-NEXT: Line {{[0-9]+}}: test3
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| /external/valgrind/none/tests/mips64/ |
| branch_and_jump_instructions.c | 107 #define TEST3(instruction, RDval, RSval, RTval, RD, RS, RT) \
193 TEST3("beq", 0, 0, 1, 2, 3, 4);
194 TEST3("beq", 1, 1, 1, 3, 4, 5);
195 TEST3("beq", 2, 0xffffffff, 0xffffffff, 4, 5, 6);
196 TEST3("beq", 3, 0xffffffff, 0xfffffffe, 5, 6, 7);
197 TEST3("beq", 4, 0xfffffffe, 0xffffffff, 6, 7, 8);
198 TEST3("beq", 5, 0xffffffff, 0xffffffff, 7, 8, 9);
199 TEST3("beq", 6, 0x5, 0x5, 8, 9, 10);
200 TEST3("beq", 7, -3, -4, 9, 10, 11);
201 TEST3("beq", 8, 125, 125, 10, 11, 12)
[all...] |
| move_instructions.c | 93 #define TEST3(instruction, FD, FS, cc, offset) \
210 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 0);
211 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 8);
212 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 16);
213 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 24);
214 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 32)
215 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 40)
216 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 48)
217 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 56)
218 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 0, 0)
[all...] |
| fpu_load_store.c | 16 TEST3("ldc1", i, reg_val1);
19 TEST3("ldc1", i, reg_val2);
|
| arithmetic_instruction.c | 67 TEST3("clo $t0, $t1", reg_val1[i], t0, t1);
74 TEST3("clz $t0, $t1", reg_val1[i], t0, t1);
123 TEST3("dclo $t0, $t1", reg_val1[i], t0, t1);
124 TEST3("dclo $v0, $v1", reg_val2[i], v0, v1);
129 TEST3("dclz $t0, $t1", reg_val1[i], t0, t1);
130 TEST3("dclz $v0, $v1", reg_val2[i], v0, v1);
281 TEST3("seb $t0, $t1", reg_val1[i], t0, t1);
290 TEST3("seh $t0, $t1", reg_val1[i], t0, t1);
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| macro_load_store.h | 47 #define TEST3(instruction, offset, mem) \
|
| macro_int.h | 35 #define TEST3(instruction, RSval, RD, RS) \
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| cvm_atomic.c | 102 /* TEST3 macro is used for store atomic add and store atomic add doubleword
110 #define TEST3(instruction, offset, mem, value) \
211 TEST3("saa", j, reg_val_double_copy, reg_val_double[j]);
217 TEST3("saad", j, reg_val_double_copy, reg_val_double[j]);
|
| /external/llvm/test/MC/AsmParser/ |
| directive_space.s | 18 # CHECK: TEST3
20 TEST3:
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| directive_ascii.s | 17 # CHECK: TEST3:
22 TEST3:
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| directive_values.s | 18 # CHECK: TEST3:
20 TEST3:
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| directive_fill.s | 21 # CHECK: TEST3
23 TEST3:
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| /external/swiftshader/third_party/LLVM/test/MC/AsmParser/ |
| directive_ascii.s | 17 # CHECK: TEST3:
22 TEST3:
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| directive_values.s | 18 # CHECK: TEST3:
20 TEST3:
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| /external/clang/test/Sema/ |
| warn-extern-main.c | 17 #elif TEST3
|
| /external/clang/test/CXX/basic/basic.start/basic.start.main/ |
| p3.cpp | 22 #elif TEST3
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| p2.cpp | 41 #elif TEST3
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| /external/llvm/test/MC/ARM/ |
| eh-directive-setfp-diagnostics.s | 44 @ TEST3: .setfp with bad fp register
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| eh-directive-multiple-offsets.s | 67 @ TEST3: Check .setfp, .pad, .setfp directive.
69 .section .TEST3
91 @ CHECK: Name: .ARM.extab.TEST3
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| eh-directive-pad.s | 89 @ TEST3
91 .section .TEST3
122 @ CHECK: Name: .ARM.extab.TEST3
|
