| /device/google/contexthub/firmware/os/algos/calibration/accelerometer/ |
| accel_cal.c | 170 accelCalAlgoInit(&acc->ac1[0], fx, fxb, fy, fyb, fz, fzb, fle);
171 accelCalAlgoInit(&acc->ac1[1], fx, fxb, fy, fyb, fz, fzb, fle);
295 static int accelGoodData(struct AccelStillDet *asd, struct AccelCalAlgo *ac1,
302 if (PHI < asd->mean_x && ac1->agd.nx < ac1->agd.nfx) {
303 ac1->agd.nx += 1;
304 ac1->agd.acc_t += temp;
305 ac1->agd.acc_tt += temp * temp;
306 accelCalUpdate(&ac1->akf, asd);
309 if (PHIb > asd->mean_x && ac1->agd.nxb < ac1->agd.nfxb)
[all...] |
| accel_cal.h | 132 struct AccelCalAlgo ac1[ACCEL_CAL_NUM_TEMP_WINDOWS]; member in struct:AccelCal
|
| /external/llvm/test/MC/Mips/dsp/ |
| invalid.s | 4 extp $2, $ac1, -1 # CHECK: :[[@LINE]]:18: error: expected 5-bit unsigned immediate
5 extp $2, $ac1, 32 # CHECK: :[[@LINE]]:18: error: expected 5-bit unsigned immediate
6 extpdp $2, $ac1, -1 # CHECK: :[[@LINE]]:20: error: expected 5-bit unsigned immediate
7 extpdp $2, $ac1, 32 # CHECK: :[[@LINE]]:20: error: expected 5-bit unsigned immediate
8 extr.w $2, $ac1, -1 # CHECK: :[[@LINE]]:20: error: expected 5-bit unsigned immediate
9 extr.w $2, $ac1, 32 # CHECK: :[[@LINE]]:20: error: expected 5-bit unsigned immediate
10 extr_r.w $2, $ac1, -1 # CHECK: :[[@LINE]]:22: error: expected 5-bit unsigned immediate
11 extr_r.w $2, $ac1, 32 # CHECK: :[[@LINE]]:22: error: expected 5-bit unsigned immediate
12 extr_rs.w $2, $ac1, -1 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediate
13 extr_rs.w $2, $ac1, 32 # CHECK: :[[@LINE]]:23: error: expected 5-bit unsigned immediat
[all...] |
| valid.s | 25 dpaq_s.w.ph $ac1, $1, $2 # CHECK: dpaq_s.w.ph $ac1, $1, $2 # encoding: [0x7c,0x22,0x09,0x30]
27 dpau.h.qbl $ac1, $9, $10 # CHECK: dpau.h.qbl $ac1, $9, $10 # encoding: [0x7d,0x2a,0x08,0xf0]
28 dpau.h.qbr $ac1, $11, $12 # CHECK: dpau.h.qbr $ac1, $11, $12 # encoding: [0x7d,0x6c,0x09,0xf0]
30 dpsq_sa.l.w $ac1, $19, $20 # CHECK: dpsq_sa.l.w $ac1, $19, $20 # encoding: [0x7e,0x74,0x0b,0x70]
32 dpsu.h.qbr $ac1, $7, $8 # CHECK: dpsu.h.qbr $ac1, $7, $8 # encoding: [0x7c,0xe8,0x0b,0xf0
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| mips64-dsp.s | 36 dextp $29,$ac1,0
37 dextp $29,$ac1,1
38 dextp $29,$ac1,31
46 dextr_rs.l $5,$ac1,0
47 dextr_rs.l $5,$ac1,1
48 dextr_rs.l $5,$ac1,31
49 dextr_r.w $1,$ac1,0
50 dextr_r.w $1,$ac1,1
51 dextr_r.w $1,$ac1,31
63 dextrv_rs.w $13,$ac1,$1
[all...] |
| mips32-dsp.s | 70 dpau.h.qbr $ac1,$20,$21
74 dpsq_s.w.ph $ac1,$24,$25
78 maq_s.w.phl $ac1,$28,$29
102 extr.w $18,$ac1,0
103 extr.w $18,$ac1,31
110 extrv_s.h $22,$ac1,$23
114 extp $26,$ac1,0
115 extp $26,$ac1,31
120 shilo $ac1,-32
121 shilo $ac1,3
[all...] |
| mips32-dspr2.s | 24 dps.w.ph $ac1,$10,$11
28 msubu $ac1,$14,$15
65 dpax.w.ph $ac1,$13,$14
69 dpsqx_s.w.ph $ac1,$17,$18
|
| mips64-dsp.d | 36 0+0068 <[^>]*> 7c1d08bc dextp sp,\$ac1,0x0
37 0+006c <[^>]*> 7c3d08bc dextp sp,\$ac1,0x1
38 0+0070 <[^>]*> 7ffd08bc dextp sp,\$ac1,0x1f
46 0+0090 <[^>]*> 7c050dbc dextr_rs\.l a1,\$ac1,0x0
47 0+0094 <[^>]*> 7c250dbc dextr_rs\.l a1,\$ac1,0x1
48 0+0098 <[^>]*> 7fe50dbc dextr_rs\.l a1,\$ac1,0x1f
49 0+009c <[^>]*> 7c01093c dextr_r\.w at,\$ac1,0x0
50 0+00a0 <[^>]*> 7c21093c dextr_r\.w at,\$ac1,0x1
51 0+00a4 <[^>]*> 7fe1093c dextr_r\.w at,\$ac1,0x1f
63 0+00d4 <[^>]*> 7dcd09fc dextrv_rs\.w t5,\$ac1,t
[all...] |
| micromips@mips32-dsp.d | 71 0+00f0 <[^>]*> 02b4 70bc dpau\.h\.qbr \$ac1,s4,s5
75 0+0100 <[^>]*> 0338 46bc dpsq_s\.w\.ph \$ac1,t8,t9
79 0+0110 <[^>]*> 03bc 5a7c maq_s\.w\.phl \$ac1,gp,sp
103 0+0170 <[^>]*> 0240 4e7c extr\.w s2,\$ac1,0x0
104 0+0174 <[^>]*> 025f 4e7c extr\.w s2,\$ac1,0x1f
111 0+0190 <[^>]*> 02d7 7ebc extrv_s\.h s6,\$ac1,s7
115 0+01a0 <[^>]*> 0340 667c extp k0,\$ac1,0x0
116 0+01a4 <[^>]*> 035f 667c extp k0,\$ac1,0x1f
121 0+01b8 <[^>]*> 0020 401d shilo \$ac1,-32
122 0+01bc <[^>]*> 001f 401d shilo \$ac1,3
[all...] |
| mips32-dsp.d | 70 0+00f0 <[^>]*> 7e9509f0 dpau\.h\.qbr \$ac1,s4,s5
74 0+0100 <[^>]*> 7f190970 dpsq_s\.w\.ph \$ac1,t8,t9
78 0+0110 <[^>]*> 7f9d0d30 maq_s\.w\.phl \$ac1,gp,sp
102 0+0170 <[^>]*> 7c120838 extr\.w s2,\$ac1,0x0
103 0+0174 <[^>]*> 7ff20838 extr\.w s2,\$ac1,0x1f
110 0+0190 <[^>]*> 7ef60bf8 extrv_s\.h s6,\$ac1,s7
114 0+01a0 <[^>]*> 7c1a08b8 extp k0,\$ac1,0x0
115 0+01a4 <[^>]*> 7ffa08b8 extp k0,\$ac1,0x1f
120 0+01b8 <[^>]*> 7e000eb8 shilo \$ac1,-32
121 0+01bc <[^>]*> 7df00eb8 shilo \$ac1,3
[all...] |
| mipsr6@mips32-dsp.d | 71 0+00f0 <[^>]*> 7e9509f0 dpau\.h\.qbr \$ac1,s4,s5
75 0+0100 <[^>]*> 7f190970 dpsq_s\.w\.ph \$ac1,t8,t9
79 0+0110 <[^>]*> 7f9d0d30 maq_s\.w\.phl \$ac1,gp,sp
103 0+0170 <[^>]*> 7c120838 extr\.w s2,\$ac1,0x0
104 0+0174 <[^>]*> 7ff20838 extr\.w s2,\$ac1,0x1f
111 0+0190 <[^>]*> 7ef60bf8 extrv_s\.h s6,\$ac1,s7
115 0+01a0 <[^>]*> 7c1a08b8 extp k0,\$ac1,0x0
116 0+01a4 <[^>]*> 7ffa08b8 extp k0,\$ac1,0x1f
121 0+01b8 <[^>]*> 7e000eb8 shilo \$ac1,-32
122 0+01bc <[^>]*> 7df00eb8 shilo \$ac1,3
[all...] |
| mips32-dspr2.d | 25 0+003c <[^>]*> 7d4b0870 dps\.w\.ph \$ac1,t2,t3
29 0+004c <[^>]*> 71cf0805 msubu \$ac1,t6,t7
66 0+00e0 <[^>]*> 7dae0a30 dpax\.w\.ph \$ac1,t5,t6
70 0+00f0 <[^>]*> 7e320e70 dpsqx_s\.w\.ph \$ac1,s1,s2
|
| mipsr6@mips32-dspr2.d | 26 0+003c <[^>]*> 7d4b0870 dps\.w\.ph \$ac1,t2,t3
30 0+004c <[^>]*> 71cf0805 msubu \$ac1,t6,t7
67 0+00e0 <[^>]*> 7dae0a30 dpax\.w\.ph \$ac1,t5,t6
71 0+00f0 <[^>]*> 7e320e70 dpsqx_s\.w\.ph \$ac1,s1,s2
|
| micromips@mips32-dspr2.d | 26 0+003a <[^>]*> 016a 44bc dps\.w\.ph \$ac1,t2,t3
30 0+004a <[^>]*> 01ee 7abc msubu \$ac1,t6,t7
67 0+00de <[^>]*> 01cd 50bc dpax\.w\.ph \$ac1,t5,t6
71 0+00ee <[^>]*> 0251 66bc dpsqx_s\.w\.ph \$ac1,s1,s2
|
| /external/llvm/test/MC/Mips/micromips-dsp/ |
| valid.s | 13 dpaq_s.w.ph $ac1, $5, $3 # CHECK: dpaq_s.w.ph $ac1, $5, $3 # encoding: [0x00,0x65,0x42,0xbc]
15 dpau.h.qbl $ac1, $3, $4 # CHECK: dpau.h.qbl $ac1, $3, $4 # encoding: [0x00,0x83,0x60,0xbc]
17 extp $zero, $ac1, 6 # CHECK: extp $zero, $ac1, 6 # encoding: [0x00,0x06,0x66,0x7c]
18 extpdp $2, $ac1, 2 # CHECK: extpdp $2, $ac1, 2 # encoding: [0x00,0x42,0x76,0x7c]
27 extrv_rs.w $15, $ac1, $20 # CHECK: extrv_rs.w $15, $ac1, $20 # encoding: [0x01,0xf4,0x6e,0xbc
[all...] |
| invalid.s | 22 shilo $ac1, 64 # CHECK: :[[@LINE]]:15: error: expected 6-bit signed immediate
23 shilo $ac1, -64 # CHECK: :[[@LINE]]:15: error: expected 6-bit signed immediate
|
| /external/libopus/celt/ |
| fixed_c5x.h | 39 long ac0, ac1; local
41 ac1 = ac0 + _lmpy(i,j>>16);
42 return _lmpyu(i,j) + (ac1<<16);
|
| /external/llvm/test/MC/Mips/micromips-dspr2/ |
| valid.s | 23 dpaq_s.w.ph $ac1, $5, $3 # CHECK: dpaq_s.w.ph $ac1, $5, $3 # encoding: [0x00,0x65,0x42,0xbc]
27 dpau.h.qbl $ac1, $3, $4 # CHECK: dpau.h.qbl $ac1, $3, $4 # encoding: [0x00,0x83,0x60,0xbc]
30 extp $zero, $ac1, 6 # CHECK: extp $zero, $ac1, 6 # encoding: [0x00,0x06,0x66,0x7c]
31 extpdp $2, $ac1, 2 # CHECK: extpdp $2, $ac1, 2 # encoding: [0x00,0x42,0x76,0x7c]
40 extrv_rs.w $15, $ac1, $20 # CHECK: extrv_rs.w $15, $ac1, $20 # encoding: [0x01,0xf4,0x6e,0xbc
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| vfp-fma-thumb.d | 13 0[0-9a-f]+ <[^>]+> eea0 0ac1 vfms\.f32 s0, s1, s2
16 0[0-9a-f]+ <[^>]+> eea0 0ac1 vfmseq\.f32 s0, s1, s2
18 0[0-9a-f]+ <[^>]+> ee90 0ac1 vfnma\.f32 s0, s1, s2
21 0[0-9a-f]+ <[^>]+> ee90 0ac1 vfnmaeq\.f32 s0, s1, s2
|
| vfp-neon-syntax_t2.d | 51 0[0-9a-f]+ <[^>]+> ee20 0ac1 (vnmul\.f32|fnmuls) s0, s1, s2
54 0[0-9a-f]+ <[^>]+> ee20 0ac1 (vnmuleq\.f32|fnmulseq) s0, s1, s2
56 0[0-9a-f]+ <[^>]+> ee10 0ac1 (vnmla\.f32|fnmacs) s0, s1, s2
59 0[0-9a-f]+ <[^>]+> ee10 0ac1 (vnmlaeq\.f32|fnmacseq) s0, s1, s2
76 0[0-9a-f]+ <[^>]+> ee00 0ac1 (vmls\.f32|fmscs) s0, s1, s2
79 0[0-9a-f]+ <[^>]+> ee00 0ac1 (vmlseq\.f32|fmscseq) s0, s1, s2
86 0[0-9a-f]+ <[^>]+> ee30 0ac1 (vsub\.f32|fsubs) s0, s1, s2
89 0[0-9a-f]+ <[^>]+> ee30 0ac1 (vsubeq\.f32|fsubseq) s0, s1, s2
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/pdp11/ |
| opcode.s | 184 tstf ac1
187 mulf $0f0.25,ac1
190 ldf @bar,ac1
193 stf ac1,-(sp)
211 absd ac1
219 std ac1,(r2)
225 stcdf ac1,ac4
226 ldcid r0,ac1
|
| /external/llvm/test/MC/Mips/dspr2/ |
| valid.s | 40 dpaq_s.w.ph $ac1, $1, $2 # CHECK: dpaq_s.w.ph $ac1, $1, $2 # encoding: [0x7c,0x22,0x09,0x30]
44 dpau.h.qbl $ac1, $9, $10 # CHECK: dpau.h.qbl $ac1, $9, $10 # encoding: [0x7d,0x2a,0x08,0xf0]
45 dpau.h.qbr $ac1, $11, $12 # CHECK: dpau.h.qbr $ac1, $11, $12 # encoding: [0x7d,0x6c,0x09,0xf0]
49 dpsq_sa.l.w $ac1, $19, $20 # CHECK: dpsq_sa.l.w $ac1, $19, $20 # encoding: [0x7e,0x74,0x0b,0x70]
53 dpsu.h.qbr $ac1, $7, $8 # CHECK: dpsu.h.qbr $ac1, $7, $8 # encoding: [0x7c,0xe8,0x0b,0xf0
[all...] |
| /external/libjpeg-turbo/simd/ |
| jsimd_mips_dspr2.S | 196 mtlo t8, $ac1
199 maddu $ac1, s5, t5
202 maddu $ac1, s3, t3
205 maddu $ac1, s4, t4
208 extr.w t4, $ac1, 16
417 mtlo s7, $ac1
418 maddu $ac1, s2, s5
419 maddu $ac1, s1, s4
420 maddu $ac1, s0, s3
429 extr.w t2, $ac1, 1
[all...] |
| /external/llvm/test/MC/Mips/mips32r2/ |
| invalid-dsp.s | 28 dpau.h.qbl $ac1,$10,$24 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
29 dpau.h.qbr $ac1,$s7,$s6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
37 extrv_r.w $8,$ac1,$s6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
38 extrv_rs.w $gp,$ac1,$s6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
39 extrv_s.h $s2,$ac1,$14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
49 maq_sa.w.phr $ac1,$at,$10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
53 mthi $v0,$ac1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
55 mtlo $v0,$ac1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
62 mult $ac1, $2, $3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
63 multu $ac1, $2, $3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently e (…)
[all...] |
| invalid-dspr2.s | 37 dpa.w.ph $ac1,$s7,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
40 dpaqx_sa.w.ph $ac1,$zero,$s5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
41 dpau.h.qbl $ac1,$10,$24 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
42 dpau.h.qbr $ac1,$s7,$s6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
44 dps.w.ph $ac1,$a3,$a1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
55 extrv_r.w $8,$ac1,$s6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
56 extrv_rs.w $gp,$ac1,$s6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
57 extrv_s.h $s2,$ac1,$14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
67 maq_sa.w.phr $ac1,$at,$10 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
71 mthi $v0,$ac1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enab (…)
[all...] |
