| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-powerpc/ |
| vle-multiseg-6b.s | 3 and. 3,4,5
4 and 3,4,5
|
| vle-multiseg-6c.s | 3 and. 3,4,5
4 and 3,4,5
|
| /external/clang/test/Preprocessor/ |
| cxx_oper_keyword.cpp | 7 // Valid because 'and' is a spelling of '&&'
8 #if defined foo and bar
14 //expected-error@+2 {{C++ operator 'and' (aka '&&') used as a macro name}}
16 #define and foo macro
26 //expected-error@+3 {{C++ operator 'and' (aka '&&') used as a macro name}}
28 //expected-warning@+2 {{and is defined}}
29 #ifdef and
30 #warning and is defined
|
| cxx_oper_spelling.cpp | 9 // This should be spelled as 'and', not '&&'
10 a: X(and)
11 // CHECK: a: "and"
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| branch-misc-3.s | 1 # ctc1s and compares shouldn't appear in a branch delay slot.
|
| /external/llvm/test/MC/X86/ |
| intel-syntax-bitwise-ops.s | 6 and ecx, 1+2
8 and ecx, 1|2
10 and ecx, 1*3
12 and ecx, 1&3
14 and ecx, (1&2)
16 and ecx, ((1)|2)
18 and ecx, 1&2+3
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arc/ |
| and.s | 0 # and test
3 and r0,r1,r2
4 and r26,fp,sp
5 and ilink1,ilink2,blink
6 and r56,r59,lp_count
8 and r0,r1,0
9 and r0,0,r2
10 and 0,r1,r2
11 and r0,r1,-1
12 and r0,-1,r
[all...] |
| and.d | 9 0: 00 84 00 60 60008400 and r0,r1,r2
10 4: 00 b8 4d 63 634db800 and gp,fp,sp
11 8: 00 3e af 63 63af3e00 and ilink1,ilink2,blink
12 c: 00 f8 1d 67 671df800 and r56,r59,lp_count
13 10: 00 fe 00 60 6000fe00 and r0,r1,0
14 14: 00 84 1f 60 601f8400 and r0,0,r2
15 18: 00 84 e0 67 67e08400 and 0,r1,r2
16 1c: ff ff 00 60 6000ffff and r0,r1,-1
17 20: ff 85 1f 60 601f85ff and r0,-1,r2
18 24: 00 84 e0 67 67e08400 and 0,r1,r
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/xc16x/ |
| and.s | 6 and r0,r1
7 and r0,[r1]
8 and r0,[r1+]
9 and r0,#3
10 and r0,#0xfcbe
11 and r0,0x0230
12 and 0x320,r0
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic54x/ |
| address.s | 4 and Y,a ; direct
5 and *ar1,a ; indirect (all modes)
6 and *ar1-,b
7 and *ar1+,a
9 and *ar1-0b,a
10 and *ar1-0,b
11 and *ar1+0,a
12 and *ar1+0b,b
13 and *ar1-%,a
14 and *ar1-0%,b
[all...] |
| /prebuilts/misc/common/swig/include/2.0.11/ruby/ |
| extconf.rb | 5 if have_header('yourlib.h') and have_library('yourlib', 'yourlib_init')
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-aarch64/ |
| emit-relocs-280.s | 0 and x0,x0,x0
2 and x0,x0,x0
3 and x0,x0,x0
4 and x0,x0,x0
|
| emit-relocs-282.s | 0 and x0,x0,x0
2 and x0,x0,x0
3 and x0,x0,x0
4 and x0,x0,x0
|
| emit-relocs-283.s | 0 and x0,x0,x0
2 and x0,x0,x0
3 and x0,x0,x0
4 and x0,x0,x0
|
| emit-relocs1.s | 0 and x0,x0,x0
2 and x0,x0,x0
3 and x0,x0,x0
4 and x0,x0,x0
|
| emit-relocs-279.s | 0 and x0,x0,x0
2 and x0,x0,x0
3 and x0,x0,x0
4 and x0,x0,x0
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mn10300/ |
| logical.s | 2 and d1,d2
3 and 127,d2
4 and 32767,d3
5 and 131071,d3
6 and 32767,psw
|
| /build/kati/testcase/ |
| and.mk | 7 $(and ${TRUE}, $(info PASS_1))
8 $(and ${FALSE}, $(info FAIL_2))
10 $(info $(and ${TRUE}, PASS, PASS))
12 $(info $(and ${TRUE}, $(X) ))
13 $(info $(and ${TRUE}, $(Y) ))
14 $(and ${FALSE} , $(info FAIL_3))
|
| /external/valgrind/gdbserver_tests/ |
| nlgone_abrt.stderrB.exp | 1 relaying data between gdb and process ....
|
| nlgone_exit.stderrB.exp | 1 relaying data between gdb and process ....
|
| nlgone_return.stderrB.exp | 1 relaying data between gdb and process ....
|
| nlself_invalidate.stderrB.exp | 1 relaying data between gdb and process ....
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/rx/ |
| and.d | 9 0: 64 00 and #0, r0
10 2: 64 0f and #0, r15
11 4: 64 f0 and #15, r0
12 6: 64 ff and #15, r15
13 8: 75 20 80 and #-128, r0
14 b: 75 2f 80 and #-128, r15
15 e: 75 20 7f and #127, r0
16 11: 75 2f 7f and #127, r15
17 14: 76 20 00 80 and #0xffff8000, r0
18 18: 76 2f 00 80 and #0xffff8000, r1
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/cris/ |
| pushpopv32.s | 1 ; Check that push and pop builtin "macros" aren't recognized for
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mn10200/ |
| logical.s | 2 and d1,d2
3 and 127,d2
4 and 32767,d3
5 and 32767,psw
|
