| /external/skia/src/opts/ |
| SkOpts_avx.cpp | 11 #define SK_OPTS_NS avx
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| arch-avx-1.d | 1 #as: -march=generic32+avx+aes+pclmul
3 #name: i386 arch avx 1
|
| att-regs.s | 47 .arch .avx
|
| intel-regs.s | 51 .arch .avx
|
| arch-10-btver1.d | 2 #as: -march=btver1+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+padlock+fma+bmi+tbm
|
| x86-64-arch-2-btver1.d | 2 #as: -march=btver1+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+movbe+ept+padlock+fma+bmi+tbm
|
| arch-10-lzcnt.d | 2 #as: -march=i686+nop+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+lzcnt+padlock+bmi+tbm
|
| arch-10-prefetchw.d | 2 #as: -march=i686+nop+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+syscall+rdtscp+sse4a+svme+lzcnt+padlock+bmi+tbm+prfchw
|
| arch-10.d | 1 #as: -march=i686+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+ept+clflush+nop+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
|
| x86-64-arch-2-lzcnt.d | 2 #as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+lzcnt+padlock+bmi+tbm
|
| x86-64-arch-2-prefetchw.d | 2 #as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+sse4a+svme+lzcnt+padlock+bmi+tbm+prfchw
|
| x86-64-arch-2.d | 1 #as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
|
| /external/skia/src/jumper/ |
| build_stages.py | 40 avx = '-mno-red-zone -mavx'.split() variable
41 subprocess.check_call(clang + cflags + avx +
43 ['-o', 'avx.o'])
44 subprocess.check_call(clang + cflags + avx + ['-DWIN'] +
156 parse_object_file('avx.o', 'uint8_t')
|
| SkJumper.cpp | 118 size_t ASM(start_pipeline,avx )(size_t, void**, K*, size_t);
123 ASM(just_return,avx),
130 #define M(st) StageFn ASM(st,avx);
194 #define M(st) case SkRasterPipeline::st: return ASM(st,avx);
290 if (1 && SkCpu::Supports(SkCpu::AVX)) {
291 if (!build_and_run(1, lookup_avx, ASM(just_return,avx), ASM(start_pipeline,avx))) {
|
| /external/flac/libFLAC/include/private/ |
| cpu.h | 130 FLAC__bool avx; member in struct:__anon19175
142 FLAC__bool avx; member in struct:__anon19176
|
| /external/flac/libFLAC/ |
| cpu.c | 59 info->ia32.avx = false;
68 info->x86.avx = false;
185 info->ia32.avx = (flags_ecx & FLAC__CPUINFO_IA32_CPUID_AVX )? true : false;
203 fprintf(stderr, " AVX ........ %c\n", info->ia32.avx ? 'Y' : 'n');
325 * now have to check for OS support of AVX instructions
327 if(info->ia32.avx && ia32_osxsave) {
332 fprintf(stderr, " AVX OS sup . %c\n", info->ia32.avx ? 'Y' : 'n');
335 else /* no OS AVX support*
[all...] |
| /build/soong/cc/config/ |
| x86_64_device.go | 76 "-march=core-avx-i",
92 "avx": []string{"-mavx"},
113 "avx",
127 "avx",
135 "avx",
|
| x86_device.go | 88 "-march=core-avx-i",
106 "avx": []string{"-mavx"},
129 "avx",
147 "avx",
156 "avx",
|
| /external/skia/src/core/ |
| SkOpts.cpp | 22 #define SK_OPTS_NS avx
109 if (SkCpu::Supports(SkCpu::AVX )) { Init_avx(); }
|
| /external/boringssl/src/crypto/sha/asm/ |
| sha512-x86_64.pl | 55 # the effort, not on pre-AVX processors. [Obviously with exclusion
69 # for AVX, but with %ymm as operands. Side effect is increased stack
80 # SHA256 SSSE3 AVX/XOP(*) SHA512 AVX/XOP(*)
118 # TODO(davidben): Enable AVX2 code after testing by setting $avx to 2. Is it
121 $avx = 1;
126 $avx=1 if (!$shaext && $avx);
258 $code.=<<___ if ($SZ==4 || $avx);
268 $code.=<<___ if ($avx && $SZ==8)
[all...] |
| sha256-586.pl | 28 # May version, >60% over original. Add AVX+shrd code path, >25%
35 # not shown.) Add AVX+BMI code path.
74 $xmm=$avx=0;
81 # TODO(davidben): Enable AVX2 code after testing by setting $avx to 2.
82 $avx = 1;
84 $avx = 0 unless ($xmm);
214 &and ("ebx",1<<28|1<<9); # mask AVX and SSSE3 bits
221 &je (&label("AVX")) if ($avx);
968 if ($avx) {
[all...] |
| /external/libvpx/libvpx/build/make/ |
| rtcd.pl | 394 @ALL_ARCHS = filter(qw/mmx sse sse2 sse3 ssse3 sse4_1 avx avx2/);
397 @ALL_ARCHS = filter(qw/mmx sse sse2 sse3 ssse3 sse4_1 avx avx2/);
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| x86-64-arch-2.d | 2 #as: -march=generic64+avx+vmx+smx+xsave+xsaveopt+aes+pclmul+fma+movbe+cx16+ept+clflush+syscall+rdtscp+3dnowa+sse4a+svme+abm+padlock+bmi+tbm
|
| x86-64-avx-swap-intel.d | 1 #source: ../x86-64-avx-swap.s
4 #name: x86-64 (ILP32) AVX swap (Intel mode)
|
| x86-64-avx-swap.d | 1 #source: ../x86-64-avx-swap.s
4 #name: x86-64 (ILP32) AVX swap
|
