/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
r6.s | 122 bovc $0, $0, ext 123 bovc $2, $0, ext 124 bovc $0, $2, ext 125 bovc $2, $4, ext 126 bovc $4, $2, ext 127 bovc $2, $4, . + 4 + (-32768 << 2) 128 bovc $2, $4, . + 4 + (32767 << 2) 129 bovc $2, $4, 1f 130 bovc $2, $2, ext 131 bovc $2, $2, . + 4 + (-32768 << 2 [all...] |
r6-n32.d | 157 0+0208 <[^>]*> 20000000 bovc zero,zero,0000020c <[^>]*> 160 0+0210 <[^>]*> 20400000 bovc v0,zero,00000214 <[^>]*> 163 0+0218 <[^>]*> 20400000 bovc v0,zero,0000021c <[^>]*> 166 0+0220 <[^>]*> 20820000 bovc a0,v0,00000224 <[^>]*> 169 0+0228 <[^>]*> 20820000 bovc a0,v0,0000022c <[^>]*> 172 0+0230 <[^>]*> 20820000 bovc a0,v0,00000234 <[^>]*> 175 0+0238 <[^>]*> 20820000 bovc a0,v0,0000023c <[^>]*> 178 0+0240 <[^>]*> 20820000 bovc a0,v0,00000244 <[^>]*> 181 0+0248 <[^>]*> 20420000 bovc v0,v0,0000024c <[^>]*> 184 0+0250 <[^>]*> 20420000 bovc v0,v0,00000254 <[^>]* [all...] |
r6.d | 156 0+0208 <[^>]*> 2000ffff bovc zero,zero,00000208 <[^>]*> 159 0+0210 <[^>]*> 2040ffff bovc v0,zero,00000210 <[^>]*> 162 0+0218 <[^>]*> 2040ffff bovc v0,zero,00000218 <[^>]*> 165 0+0220 <[^>]*> 2082ffff bovc a0,v0,00000220 <[^>]*> 168 0+0228 <[^>]*> 2082ffff bovc a0,v0,00000228 <[^>]*> 171 0+0230 <[^>]*> 20828000 bovc a0,v0,fffe0234 <[^>]*> 174 0+0238 <[^>]*> 20827fff bovc a0,v0,00020238 <[^>]*> 177 0+0240 <[^>]*> 2082ffff bovc a0,v0,00000240 <[^>]*> 180 0+0248 <[^>]*> 2042ffff bovc v0,v0,00000248 <[^>]*> 183 0+0250 <[^>]*> 20428000 bovc v0,v0,fffe0254 <[^>]* [all...] |
r6-n64.d | 189 0+0208 <[^>]*> 20000000 bovc zero,zero,0+020c <[^>]*> 194 0+0210 <[^>]*> 20400000 bovc v0,zero,0+0214 <[^>]*> 199 0+0218 <[^>]*> 20400000 bovc v0,zero,0+021c <[^>]*> 204 0+0220 <[^>]*> 20820000 bovc a0,v0,0+0224 <[^>]*> 209 0+0228 <[^>]*> 20820000 bovc a0,v0,0+022c <[^>]*> 214 0+0230 <[^>]*> 20820000 bovc a0,v0,0+0234 <[^>]*> 219 0+0238 <[^>]*> 20820000 bovc a0,v0,0+023c <[^>]*> 224 0+0240 <[^>]*> 20820000 bovc a0,v0,0+0244 <[^>]*> 229 0+0248 <[^>]*> 20420000 bovc v0,v0,0+024c <[^>]*> 234 0+0250 <[^>]*> 20420000 bovc v0,v0,0+0254 <[^>]* [all...] |
/external/llvm/test/MC/Mips/micromips32r6/ |
valid.s | 346 bovc $2, $4, 24 # CHECK: bovc $2, $4, 24 # encoding: [0x74,0x44,0x00,0x0c] 347 bovc $4, $2, 24 # CHECK: bovc $4, $2, 24 # encoding: [0x74,0x44,0x00,0x0c] [all...] |
/external/v8/src/mips/ |
assembler-mips.h | 697 void bovc(Register rs, Register rt, int16_t offset); 698 inline void bovc(Register rs, Register rt, Label* L) { 699 bovc(rs, rt, shifted_branch_offset(L)); [all...] |
disasm-mips.cc | [all...] |
assembler-mips.cc | 492 // All the 3 variants of POP10 (BOVC, BEQC, BEQZALC) and 1408 void Assembler::bovc(Register rs, Register rt, int16_t offset) { function in class:v8::Assembler [all...] |
macro-assembler-mips.cc | 1032 void MacroAssembler::Bovc(Register rs, Register rt, Label* L) { 1039 bovc(rs, rt, L); 1046 bovc(rs, rt, &skip); [all...] |
/external/v8/src/mips64/ |
assembler-mips64.h | 704 void bovc(Register rs, Register rt, int16_t offset); 705 inline void bovc(Register rs, Register rt, Label* L) { 706 bovc(rs, rt, shifted_branch_offset(L)); [all...] |
assembler-mips64.cc | 473 // All the 3 variants of POP10 (BOVC, BEQC, BEQZALC) and 1394 void Assembler::bovc(Register rs, Register rt, int16_t offset) { function in class:v8::internal::Assembler [all...] |
macro-assembler-mips64.cc | 1178 void MacroAssembler::Bovc(Register rs, Register rt, Label* L) { 1185 bovc(rs, rt, L); 1192 bovc(rs, rt, &skip); [all...] |