| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| relax-2.d | 10 38: 0f 85 88 00 00 00 jne (0x)?c6( .*)?
12 48: 75 7c jne (0x)?c6( .*)?
14 c6: 90 nop
|
| x86-64-avx-swap-intel.d | 12 [ ]*[a-f0-9]+: c5 7d 29 c6 vmovapd ymm6,ymm8
13 [ ]*[a-f0-9]+: c5 7c 29 c6 vmovaps ymm6,ymm8
14 [ ]*[a-f0-9]+: c5 7d 7f c6 vmovdqa ymm6,ymm8
15 [ ]*[a-f0-9]+: c5 7e 7f c6 vmovdqu ymm6,ymm8
16 [ ]*[a-f0-9]+: c5 7d 11 c6 vmovupd ymm6,ymm8
17 [ ]*[a-f0-9]+: c5 7c 11 c6 vmovups ymm6,ymm8
18 [ ]*[a-f0-9]+: c5 79 29 c6 vmovapd xmm6,xmm8
19 [ ]*[a-f0-9]+: c5 78 29 c6 vmovaps xmm6,xmm8
20 [ ]*[a-f0-9]+: c5 79 7f c6 vmovdqa xmm6,xmm8
21 [ ]*[a-f0-9]+: c5 7a 7f c6 vmovdqu xmm6,xmm
[all...] |
| x86-64-avx-swap.d | 11 [ ]*[a-f0-9]+: c5 7d 29 c6 vmovapd %ymm8,%ymm6
12 [ ]*[a-f0-9]+: c5 7c 29 c6 vmovaps %ymm8,%ymm6
13 [ ]*[a-f0-9]+: c5 7d 7f c6 vmovdqa %ymm8,%ymm6
14 [ ]*[a-f0-9]+: c5 7e 7f c6 vmovdqu %ymm8,%ymm6
15 [ ]*[a-f0-9]+: c5 7d 11 c6 vmovupd %ymm8,%ymm6
16 [ ]*[a-f0-9]+: c5 7c 11 c6 vmovups %ymm8,%ymm6
17 [ ]*[a-f0-9]+: c5 79 29 c6 vmovapd %xmm8,%xmm6
18 [ ]*[a-f0-9]+: c5 78 29 c6 vmovaps %xmm8,%xmm6
19 [ ]*[a-f0-9]+: c5 79 7f c6 vmovdqa %xmm8,%xmm6
20 [ ]*[a-f0-9]+: c5 7a 7f c6 vmovdqu %xmm8,%xmm
[all...] |
| avx512pf.d | 11 [ ]*[a-f0-9]+: 62 f2 fd 49 c6 8c fd 7b 00 00 00 vgatherpf0dpd 0x7b\(%ebp,%ymm7,8\)\{%k1\}
12 [ ]*[a-f0-9]+: 62 f2 fd 49 c6 8c fd 7b 00 00 00 vgatherpf0dpd 0x7b\(%ebp,%ymm7,8\)\{%k1\}
13 [ ]*[a-f0-9]+: 62 f2 fd 49 c6 4c 38 20 vgatherpf0dpd 0x100\(%eax,%ymm7,1\)\{%k1\}
14 [ ]*[a-f0-9]+: 62 f2 fd 49 c6 8c b9 00 04 00 00 vgatherpf0dpd 0x400\(%ecx,%ymm7,4\)\{%k1\}
15 [ ]*[a-f0-9]+: 62 f2 7d 49 c6 8c fd 7b 00 00 00 vgatherpf0dps 0x7b\(%ebp,%zmm7,8\)\{%k1\}
16 [ ]*[a-f0-9]+: 62 f2 7d 49 c6 8c fd 7b 00 00 00 vgatherpf0dps 0x7b\(%ebp,%zmm7,8\)\{%k1\}
17 [ ]*[a-f0-9]+: 62 f2 7d 49 c6 4c 38 40 vgatherpf0dps 0x100\(%eax,%zmm7,1\)\{%k1\}
18 [ ]*[a-f0-9]+: 62 f2 7d 49 c6 8c b9 00 04 00 00 vgatherpf0dps 0x400\(%ecx,%zmm7,4\)\{%k1\}
27 [ ]*[a-f0-9]+: 62 f2 fd 49 c6 94 fd 7b 00 00 00 vgatherpf1dpd 0x7b\(%ebp,%ymm7,8\)\{%k1\}
28 [ ]*[a-f0-9]+: 62 f2 fd 49 c6 94 fd 7b 00 00 00 vgatherpf1dpd 0x7b\(%ebp,%ymm7,8\)\{%k1\
[all...] |
| x86-64-avx512pf-intel.d | 12 [ ]*[a-f0-9]+: 62 92 fd 41 c6 8c fe 7b 00 00 00 vgatherpf0dpd ZMMWORD PTR \[r14\+ymm31\*8\+0x7b\]\{k1\}
13 [ ]*[a-f0-9]+: 62 92 fd 41 c6 8c fe 7b 00 00 00 vgatherpf0dpd ZMMWORD PTR \[r14\+ymm31\*8\+0x7b\]\{k1\}
14 [ ]*[a-f0-9]+: 62 92 fd 41 c6 4c 39 20 vgatherpf0dpd ZMMWORD PTR \[r9\+ymm31\*1\+0x100\]\{k1\}
15 [ ]*[a-f0-9]+: 62 b2 fd 41 c6 8c b9 00 04 00 00 vgatherpf0dpd ZMMWORD PTR \[rcx\+ymm31\*4\+0x400\]\{k1\}
16 [ ]*[a-f0-9]+: 62 92 7d 41 c6 8c fe 7b 00 00 00 vgatherpf0dps ZMMWORD PTR \[r14\+zmm31\*8\+0x7b\]\{k1\}
17 [ ]*[a-f0-9]+: 62 92 7d 41 c6 8c fe 7b 00 00 00 vgatherpf0dps ZMMWORD PTR \[r14\+zmm31\*8\+0x7b\]\{k1\}
18 [ ]*[a-f0-9]+: 62 92 7d 41 c6 4c 39 40 vgatherpf0dps ZMMWORD PTR \[r9\+zmm31\*1\+0x100\]\{k1\}
19 [ ]*[a-f0-9]+: 62 b2 7d 41 c6 8c b9 00 04 00 00 vgatherpf0dps ZMMWORD PTR \[rcx\+zmm31\*4\+0x400\]\{k1\}
28 [ ]*[a-f0-9]+: 62 92 fd 41 c6 94 fe 7b 00 00 00 vgatherpf1dpd ZMMWORD PTR \[r14\+ymm31\*8\+0x7b\]\{k1\}
29 [ ]*[a-f0-9]+: 62 92 fd 41 c6 94 fe 7b 00 00 00 vgatherpf1dpd ZMMWORD PTR \[r14\+ymm31\*8\+0x7b\]\{k1\
[all...] |
| x86-64-avx512pf.d | 11 [ ]*[a-f0-9]+: 62 92 fd 41 c6 8c fe 7b 00 00 00 vgatherpf0dpd 0x7b\(%r14,%ymm31,8\)\{%k1\}
12 [ ]*[a-f0-9]+: 62 92 fd 41 c6 8c fe 7b 00 00 00 vgatherpf0dpd 0x7b\(%r14,%ymm31,8\)\{%k1\}
13 [ ]*[a-f0-9]+: 62 92 fd 41 c6 4c 39 20 vgatherpf0dpd 0x100\(%r9,%ymm31,1\)\{%k1\}
14 [ ]*[a-f0-9]+: 62 b2 fd 41 c6 8c b9 00 04 00 00 vgatherpf0dpd 0x400\(%rcx,%ymm31,4\)\{%k1\}
15 [ ]*[a-f0-9]+: 62 92 7d 41 c6 8c fe 7b 00 00 00 vgatherpf0dps 0x7b\(%r14,%zmm31,8\)\{%k1\}
16 [ ]*[a-f0-9]+: 62 92 7d 41 c6 8c fe 7b 00 00 00 vgatherpf0dps 0x7b\(%r14,%zmm31,8\)\{%k1\}
17 [ ]*[a-f0-9]+: 62 92 7d 41 c6 4c 39 40 vgatherpf0dps 0x100\(%r9,%zmm31,1\)\{%k1\}
18 [ ]*[a-f0-9]+: 62 b2 7d 41 c6 8c b9 00 04 00 00 vgatherpf0dps 0x400\(%rcx,%zmm31,4\)\{%k1\}
27 [ ]*[a-f0-9]+: 62 92 fd 41 c6 94 fe 7b 00 00 00 vgatherpf1dpd 0x7b\(%r14,%ymm31,8\)\{%k1\}
28 [ ]*[a-f0-9]+: 62 92 fd 41 c6 94 fe 7b 00 00 00 vgatherpf1dpd 0x7b\(%r14,%ymm31,8\)\{%k1\
[all...] |
| avx512pf-intel.d | 12 [ ]*[a-f0-9]+: 62 f2 fd 49 c6 8c fd 7b 00 00 00 vgatherpf0dpd ZMMWORD PTR \[ebp\+ymm7\*8\+0x7b\]\{k1\}
13 [ ]*[a-f0-9]+: 62 f2 fd 49 c6 8c fd 7b 00 00 00 vgatherpf0dpd ZMMWORD PTR \[ebp\+ymm7\*8\+0x7b\]\{k1\}
14 [ ]*[a-f0-9]+: 62 f2 fd 49 c6 4c 38 20 vgatherpf0dpd ZMMWORD PTR \[eax\+ymm7\*1\+0x100\]\{k1\}
15 [ ]*[a-f0-9]+: 62 f2 fd 49 c6 8c b9 00 04 00 00 vgatherpf0dpd ZMMWORD PTR \[ecx\+ymm7\*4\+0x400\]\{k1\}
16 [ ]*[a-f0-9]+: 62 f2 7d 49 c6 8c fd 7b 00 00 00 vgatherpf0dps ZMMWORD PTR \[ebp\+zmm7\*8\+0x7b\]\{k1\}
17 [ ]*[a-f0-9]+: 62 f2 7d 49 c6 8c fd 7b 00 00 00 vgatherpf0dps ZMMWORD PTR \[ebp\+zmm7\*8\+0x7b\]\{k1\}
18 [ ]*[a-f0-9]+: 62 f2 7d 49 c6 4c 38 40 vgatherpf0dps ZMMWORD PTR \[eax\+zmm7\*1\+0x100\]\{k1\}
19 [ ]*[a-f0-9]+: 62 f2 7d 49 c6 8c b9 00 04 00 00 vgatherpf0dps ZMMWORD PTR \[ecx\+zmm7\*4\+0x400\]\{k1\}
28 [ ]*[a-f0-9]+: 62 f2 fd 49 c6 94 fd 7b 00 00 00 vgatherpf1dpd ZMMWORD PTR \[ebp\+ymm7\*8\+0x7b\]\{k1\}
29 [ ]*[a-f0-9]+: 62 f2 fd 49 c6 94 fd 7b 00 00 00 vgatherpf1dpd ZMMWORD PTR \[ebp\+ymm7\*8\+0x7b\]\{k1\
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| x86-64-avx-swap-intel.d | 12 [ ]*[a-f0-9]+: c5 7d 29 c6 vmovapd ymm6,ymm8
13 [ ]*[a-f0-9]+: c5 7c 29 c6 vmovaps ymm6,ymm8
14 [ ]*[a-f0-9]+: c5 7d 7f c6 vmovdqa ymm6,ymm8
15 [ ]*[a-f0-9]+: c5 7e 7f c6 vmovdqu ymm6,ymm8
16 [ ]*[a-f0-9]+: c5 7d 11 c6 vmovupd ymm6,ymm8
17 [ ]*[a-f0-9]+: c5 7c 11 c6 vmovups ymm6,ymm8
18 [ ]*[a-f0-9]+: c5 79 29 c6 vmovapd xmm6,xmm8
19 [ ]*[a-f0-9]+: c5 78 29 c6 vmovaps xmm6,xmm8
20 [ ]*[a-f0-9]+: c5 79 7f c6 vmovdqa xmm6,xmm8
21 [ ]*[a-f0-9]+: c5 7a 7f c6 vmovdqu xmm6,xmm
[all...] |
| x86-64-avx-swap.d | 12 [ ]*[a-f0-9]+: c5 7d 29 c6 vmovapd %ymm8,%ymm6
13 [ ]*[a-f0-9]+: c5 7c 29 c6 vmovaps %ymm8,%ymm6
14 [ ]*[a-f0-9]+: c5 7d 7f c6 vmovdqa %ymm8,%ymm6
15 [ ]*[a-f0-9]+: c5 7e 7f c6 vmovdqu %ymm8,%ymm6
16 [ ]*[a-f0-9]+: c5 7d 11 c6 vmovupd %ymm8,%ymm6
17 [ ]*[a-f0-9]+: c5 7c 11 c6 vmovups %ymm8,%ymm6
18 [ ]*[a-f0-9]+: c5 79 29 c6 vmovapd %xmm8,%xmm6
19 [ ]*[a-f0-9]+: c5 78 29 c6 vmovaps %xmm8,%xmm6
20 [ ]*[a-f0-9]+: c5 79 7f c6 vmovdqa %xmm8,%xmm6
21 [ ]*[a-f0-9]+: c5 7a 7f c6 vmovdqu %xmm8,%xmm
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/ |
| shift.d | 18 c: 83 c6 08 41 A0 = A0 >> 0x1f;
19 10: 83 c6 f8 00 A0 = A0 << 0x1f;
20 14: 83 c6 00 50 A1 = A1 >> 0x0;
21 18: 83 c6 00 10 A1 = A1 << 0x0;
22 1c: 82 c6 fd 4e R7 = R5 << 0x1f \(S\);
23 20: 82 c6 52 07 R3 = R2 >>> 0x16;
24 24: 80 c6 7a 52 R1.L = R2.H << 0xf \(S\);
25 28: 80 c6 f2 2b R5.H = R2.L >>> 0x2;
30 34: 00 c6 14 16 R3.L = ASHIFT R4.H BY R2.L;
31 38: 00 c6 07 6e R7.H = ASHIFT R7.L BY R0.L \(S\)
[all...] |
| shift2.d | 56 60: 80 c6 00 00 R0.L = R0.L >>> 0x0;
57 64: 80 c6 88 01 R0.L = R0.L >>> 0xf;
58 68: 80 c6 00 10 R0.L = R0.H >>> 0x0;
59 6c: 80 c6 88 11 R0.L = R0.H >>> 0xf;
60 70: 80 c6 00 20 R0.H = R0.L >>> 0x0;
61 74: 80 c6 88 21 R0.H = R0.L >>> 0xf;
62 78: 80 c6 00 30 R0.H = R0.H >>> 0x0;
63 7c: 80 c6 88 31 R0.H = R0.H >>> 0xf;
64 80: 80 c6 01 00 R0.L = R1.L >>> 0x0;
65 84: 80 c6 89 01 R0.L = R1.L >>> 0xf
[all...] |
| bit2.d | 38 3c: 0a c6 08 8e R7 = DEPOSIT \(R0, R1\);
39 40: 0a c6 0f 8e R7 = DEPOSIT \(R7, R1\);
40 44: 0a c6 3f 8e R7 = DEPOSIT \(R7, R7\);
41 48: 0a c6 08 82 R1 = DEPOSIT \(R0, R1\);
42 4c: 0a c6 0f 84 R2 = DEPOSIT \(R7, R1\);
43 50: 0a c6 3f 86 R3 = DEPOSIT \(R7, R7\);
44 54: 0a c6 08 ce R7 = DEPOSIT \(R0, R1\) \(X\);
45 58: 0a c6 0f ce R7 = DEPOSIT \(R7, R1\) \(X\);
46 5c: 0a c6 3f ce R7 = DEPOSIT \(R7, R7\) \(X\);
47 60: 0a c6 08 c2 R1 = DEPOSIT \(R0, R1\) \(X\)
[all...] |
| bit.d | 24 12: 0a c6 13 8a R5 = DEPOSIT \(R3, R2\);
25 16: 0a c6 37 c0 R0 = DEPOSIT \(R7, R6\) \(X\);
28 1a: 0a c6 0a 08 R4 = EXTRACT \(R2, R1.L\) \(Z\);
29 1e: 0a c6 10 04 R2 = EXTRACT \(R0, R2.L\) \(Z\);
30 22: 0a c6 23 4e R7 = EXTRACT \(R3, R4.L\) \(X\);
31 26: 0a c6 0e 4a R5 = EXTRACT \(R6, R1.L\) \(X\);
34 2a: 08 c6 08 00 BITMUX \(R1, R0, A0\) \(ASR\);
35 2e: 08 c6 13 00 BITMUX \(R2, R3, A0\) \(ASR\);
36 32: 08 c6 25 40 BITMUX \(R4, R5, A0\) \(ASL\);
37 36: 08 c6 3e 40 BITMUX \(R7, R6, A0\) \(ASL\)
[all...] |
| logical2.d | 31 2c: 0b c6 00 00 R0.L = CC = BXORSHIFT \(A0, R0\);
32 30: 0b c6 08 00 R0.L = CC = BXORSHIFT \(A0, R1\);
33 34: 0b c6 00 06 R3.L = CC = BXORSHIFT \(A0, R0\);
34 38: 0b c6 08 06 R3.L = CC = BXORSHIFT \(A0, R1\);
35 3c: 0b c6 00 40 R0.L = CC = BXOR \(A0, R0\);
36 40: 0b c6 08 40 R0.L = CC = BXOR \(A0, R1\);
37 44: 0b c6 00 46 R3.L = CC = BXOR \(A0, R0\);
38 48: 0b c6 08 46 R3.L = CC = BXOR \(A0, R1\);
39 4c: 0c c6 00 40 R0.L = CC = BXOR \(A0, A1, CC\);
40 50: 0c c6 00 40 R0.L = CC = BXOR \(A0, A1, CC\)
[all...] |
| logical.d | 29 1a: 0b c6 00 4e R7.L = CC = BXOR \(A0, R0\);
30 1e: 0b c6 08 4e R7.L = CC = BXOR \(A0, R1\);
31 22: 0c c6 00 4a R5.L = CC = BXOR \(A0, A1, CC\);
32 26: 0c c6 00 48 R4.L = CC = BXOR \(A0, A1, CC\);
35 2a: 0b c6 38 06 R3.L = CC = BXORSHIFT \(A0, R7\);
36 2e: 0b c6 10 04 R2.L = CC = BXORSHIFT \(A0, R2\);
37 32: 0c c6 00 00 A0 = BXORSHIFT \(A0, A1, CC\);
38 36: 0c c6 00 00 A0 = BXORSHIFT \(A0, A1, CC\);
|
| video2.d | 8 [ 0-9a-f]+: 0d c6 00 00 R0 = ALIGN8 \(R0, R0\);
9 [ 0-9a-f]+: 0d c6 08 00 R0 = ALIGN8 \(R0, R1\);
10 [ 0-9a-f]+: 0d c6 01 00 R0 = ALIGN8 \(R1, R0\);
11 [ 0-9a-f]+: 0d c6 09 00 R0 = ALIGN8 \(R1, R1\);
12 [ 0-9a-f]+: 0d c6 11 00 R0 = ALIGN8 \(R1, R2\);
13 [ 0-9a-f]+: 0d c6 2c 06 R3 = ALIGN8 \(R4, R5\);
14 [ 0-9a-f]+: 0d c6 07 0c R6 = ALIGN8 \(R7, R0\);
15 [ 0-9a-f]+: 0d c6 1a 02 R1 = ALIGN8 \(R2, R3\);
16 [ 0-9a-f]+: 0d c6 35 08 R4 = ALIGN8 \(R5, R6\);
17 [ 0-9a-f]+: 0d c6 08 0e R7 = ALIGN8 \(R0, R1\)
[all...] |
| /external/clang/test/CodeGen/ |
| constant-comparison.c | 10 int c6 = 44 < 33; variable
|
| /prebuilts/go/darwin-x86/test/ |
| const6.go | 21 c6 mybool1 = x < y
23 c8 = c2 == c6 // ERROR "mismatched types|incompatible types"
24 c9 = c1 == c6 // ERROR "mismatched types|incompatible types"
28 _ = c2 && c6 // ERROR "mismatched types|incompatible types"
29 _ = c1 && c6 // ERROR "mismatched types|incompatible types"
20 c6 mybool1 = x < y var
|
| /prebuilts/go/linux-x86/test/ |
| const6.go | 21 c6 mybool1 = x < y
23 c8 = c2 == c6 // ERROR "mismatched types|incompatible types"
24 c9 = c1 == c6 // ERROR "mismatched types|incompatible types"
28 _ = c2 && c6 // ERROR "mismatched types|incompatible types"
29 _ = c1 && c6 // ERROR "mismatched types|incompatible types"
20 c6 mybool1 = x < y var
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/m32r/ |
| parallel-2.d | 10 4: 7c ff c6 04 bc 0 <test> \|\| addi r6,[#]4
|
| /external/clang/test/SemaTemplate/ |
| instantiation-default-2.cpp | 16 Constant<float (*)(int, int), f> *c6; // expected-error{{non-type template argument of type 'float (int, double)' cannot be converted to a value of type 'float (*)(int, int)'}} variable
|
| /external/libvpx/libvpx/vpx_dsp/ppc/ |
| transpose_vsx.h | 41 int16x8_t c0, c1, c2, c3, c4, c5, c6, c7; local
68 c6 = vec_mergeh(b3, b7);
78 // c6: 14 34 54 74 15 35 55 75
85 v[4] = vec_mergeh(c2, c6);
86 v[5] = vec_mergel(c2, c6);
|
| /prebuilts/go/darwin-x86/test/ken/ |
| cplx2.go | 21 C6 = C1 + I // ADD(5,12)
23 Ca = C5 + C6 // ADD(15,18)
24 Cb = C5 - C6 // SUB(5,-6)
26 Cc = C5 * C6 // MUL(-22,-150)
27 Cd = C5 / C6 // DIV(0.721893,-0.532544)
28 Ce = Cd * C6 // MUL(10,6) sb C5
75 c6 := c1 + i
76 if c6 != C6 {
77 println("opcode x", c6, C6
[all...] |
| /prebuilts/go/linux-x86/test/ken/ |
| cplx2.go | 21 C6 = C1 + I // ADD(5,12)
23 Ca = C5 + C6 // ADD(15,18)
24 Cb = C5 - C6 // SUB(5,-6)
26 Cc = C5 * C6 // MUL(-22,-150)
27 Cd = C5 / C6 // DIV(0.721893,-0.532544)
28 Ce = Cd * C6 // MUL(10,6) sb C5
75 c6 := c1 + i
76 if c6 != C6 {
77 println("opcode x", c6, C6
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| micromips@mips4.d | 10 [0-9a-f]+ <[^>]*> 00c6 2018 movn a0,a2,a2
11 [0-9a-f]+ <[^>]*> 00c6 2058 movz a0,a2,a2
|
