/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
vr5400-ill.s | 2 sll.ob $f2,$f4,$f6[1] 3 sll.ob $f2,$f4,$f6 6 srl.ob $f2,$f4,$f6[1] 7 srl.ob $f2,$f4,$f6 10 rzu.ob $f2,$f6[1] 11 rzu.ob $f2,$f6 13 add.ob $f2,$f4,$f6 14 add.ob $v2,$f4,$f6 15 add.ob $f2,$v4,$f6 19 add.ob $f2,$f4,$f6[1 [all...] |
trunc.s | 4 trunc.w.d $f4,$f6,$4 6 trunc.w.s $f4,$f6,$4
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mipsr6@mips4-fp.s | 4 recip.d $f4,$f6 5 recip.s $f4,$f6 6 rsqrt.d $f4,$f6 7 rsqrt.s $f4,$f6
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mips4-fp.s | 7 c.f.d $f4,$f6 8 c.f.d $fcc1,$f4,$f6 11 madd.d $f0,$f2,$f4,$f6 15 movf.d $f4,$f6,$fcc0 16 movf.s $f4,$f6,$fcc0 17 movn.d $f4,$f6,$6 18 movn.s $f4,$f6,$6 20 movt.d $f4,$f6,$fcc0 21 movt.s $f4,$f6,$fcc0 22 movz.d $f4,$f6,$ [all...] |
mips4-fp.d | 15 [0-9a-f]+ <[^>]*> c.f.d \$f4,\$f6 16 [0-9a-f]+ <[^>]*> c.f.d \$fcc1,\$f4,\$f6 19 [0-9a-f]+ <[^>]*> madd.d \$f0,\$f2,\$f4,\$f6 22 [0-9a-f]+ <[^>]*> movf.d \$f4,\$f6,\$fcc0 23 [0-9a-f]+ <[^>]*> movf.s \$f4,\$f6,\$fcc0 24 [0-9a-f]+ <[^>]*> movn.d \$f4,\$f6,a2 25 [0-9a-f]+ <[^>]*> movn.s \$f4,\$f6,a2 27 [0-9a-f]+ <[^>]*> movt.d \$f4,\$f6,\$fcc0 28 [0-9a-f]+ <[^>]*> movt.s \$f4,\$f6,\$fcc0 29 [0-9a-f]+ <[^>]*> movz.d \$f4,\$f6,a [all...] |
set-arch.s | 45 c.f.d $f4,$f6 46 c.f.d $fcc1,$f4,$f6 49 madd.d $f0,$f2,$f4,$f6 50 madd.s $f0,$f2,$f4,$f6 52 movf.d $f4,$f6,$fcc0 53 movf.s $f4,$f6,$fcc0 55 movn.d $f4,$f6,$6 56 movn.s $f4,$f6,$6 58 movt.d $f4,$f6,$fcc0 59 movt.s $f4,$f6,$fcc [all...] |
vr5400-ill.l | 2 .*:3: Error: operand 3 must be scalar `sll.ob \$f2,\$f4,\$f6' 3 .*:7: Error: operand 3 must be scalar `srl.ob \$f2,\$f4,\$f6' 4 .*:10: Error: operand 2 must be an immediate `rzu.ob \$f2,\$f6\[1\]' 5 .*:11: Error: operand 2 must be an immediate `rzu.ob \$f2,\$f6' 6 .*:14: Error: invalid operands `add.ob \$v2,\$f4,\$f6' 7 .*:15: Error: invalid operands `add.ob \$f2,\$v4,\$f6' 10 .*:20: Error: invalid operands `add.ob \$v2,\$f4,\$f6\[1\]' 11 .*:21: Error: invalid operands `add.ob \$f2,\$v4,\$f6\[1\]' 14 .*:25: Error: vector element must be constant `add.ob \$f2,\$f4,\$f6\[foo\]' 15 .*:26: Error: missing `\]' `add.ob \$f2,\$f4,\$f6\[1} [all...] |
mipsr6@mips4-fp.l | 2 .*:4: Error: opcode not supported on this processor: .* \(.*\) `recip.d \$f4,\$f6' 3 .*:5: Error: opcode not supported on this processor: .* \(.*\) `recip.s \$f4,\$f6' 4 .*:6: Error: opcode not supported on this processor: .* \(.*\) `rsqrt.d \$f4,\$f6' 5 .*:7: Error: opcode not supported on this processor: .* \(.*\) `rsqrt.s \$f4,\$f6'
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micromips@mips4-fp.d | 20 [0-9a-f]+ <[^>]*> 54c4 043c c\.f\.d \$f4,\$f6 21 [0-9a-f]+ <[^>]*> 54c4 243c c\.f\.d \$fcc1,\$f4,\$f6 24 [0-9a-f]+ <[^>]*> 54c4 0089 madd\.d \$f0,\$f2,\$f4,\$f6 27 [0-9a-f]+ <[^>]*> 5486 0220 movf\.d \$f4,\$f6,\$fcc0 28 [0-9a-f]+ <[^>]*> 5486 0020 movf\.s \$f4,\$f6,\$fcc0 29 [0-9a-f]+ <[^>]*> 54c6 2138 movn\.d \$f4,\$f6,a2 30 [0-9a-f]+ <[^>]*> 54c6 2038 movn\.s \$f4,\$f6,a2 32 [0-9a-f]+ <[^>]*> 5486 0260 movt\.d \$f4,\$f6,\$fcc0 33 [0-9a-f]+ <[^>]*> 5486 0060 movt\.s \$f4,\$f6,\$fcc0 34 [0-9a-f]+ <[^>]*> 54c6 2178 movz\.d \$f4,\$f6,a [all...] |
mipsr6@mips4-fp.d | 9 [0-9a-f]+ <[^>]*> recip.d \$f4,\$f6 10 [0-9a-f]+ <[^>]*> recip.s \$f4,\$f6 11 [0-9a-f]+ <[^>]*> rsqrt.d \$f4,\$f6 12 [0-9a-f]+ <[^>]*> rsqrt.s \$f4,\$f6
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vr5400.d | 39 0+007c <stuff\+0x7c> add\.ob \$f2,\$f4,\$f6\[2\] 40 0+0080 <stuff\+0x80> add\.ob \$f6,\$f4,0xf 41 0+0084 <stuff\+0x84> add\.ob \$f4,\$f6,0x1f 43 0+008c <stuff\+0x8c> and\.ob \$f2,\$f4,\$f6\[2\] 44 0+0090 <stuff\+0x90> and\.ob \$f6,\$f4,0xf 45 0+0094 <stuff\+0x94> and\.ob \$f4,\$f6,0x1f 47 0+009c <stuff\+0x9c> c\.eq\.ob \$f4,\$f6\[2\] 48 0+00a0 <stuff\+0xa0> c\.eq\.ob \$f6,0xf 51 0+00ac <stuff\+0xac> c\.le\.ob \$f4,\$f6\[2\] 52 0+00b0 <stuff\+0xb0> c\.le\.ob \$f6,0x [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/s390/ |
zarch-z9-ec.s | 3 lpdfr %f6,%f2 4 lndfr %f6,%f2 5 cpsdr %f6,%f1,%f2 6 lcdfr %f6,%f2 7 ldgr %f6,%r2 8 lgdr %r2,%f6 9 adtr %f6,%f2,%f4 11 cdtr %f6,%f2 13 kdtr %f6,%f2 14 kxtr %f6,%f [all...] |
zarch-z9-ec.d | 9 .*: b3 70 00 62 [ ]*lpdfr %f6,%f2 10 .*: b3 71 00 62 [ ]*lndfr %f6,%f2 11 .*: b3 72 10 62 [ ]*cpsdr %f6,%f1,%f2 12 .*: b3 73 00 62 [ ]*lcdfr %f6,%f2 13 .*: b3 c1 00 62 [ ]*ldgr %f6,%r2 14 .*: b3 cd 00 26 [ ]*lgdr %r2,%f6 15 .*: b3 d2 40 62 [ ]*adtr %f6,%f2,%f4 17 .*: b3 e4 00 62 [ ]*cdtr %f6,%f2 19 .*: b3 e0 00 62 [ ]*kdtr %f6,%f2 20 .*: b3 e8 00 62 [ ]*kxtr %f6,%f [all...] |
esa-g5.s | 4 ad %f6,4095(%r5,%r10) 5 adb %f6,4095(%r5,%r10) 6 adbr %f6,%f9 7 adr %f6,%f9 8 ae %f6,4095(%r5,%r10) 9 aeb %f6,4095(%r5,%r10) 10 aebr %f6,%f9 11 aer %f6,%f9 18 au %f6,4095(%r5,%r10) 19 aur %f6,%f [all...] |
/external/valgrind/none/tests/mips64/ |
move_instructions.c | 210 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 0); 211 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 8); 212 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 16); 213 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 24); 214 TEST3("movf.s $f4, $f6, $fcc0", f4, f6, 1, 32 [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
x86-64-adx-intel.d | 11 [ ]*[a-f0-9]+: 67 66 0f 38 f6 81 90 01 00 00 adcx eax,DWORD PTR \[ecx\+0x190\] 12 [ ]*[a-f0-9]+: 66 0f 38 f6 ca adcx ecx,edx 13 [ ]*[a-f0-9]+: 67 66 0f 38 f6 94 f4 0f 04 f6 ff adcx edx,DWORD PTR \[esp\+esi\*8-0x9fbf1\] 14 [ ]*[a-f0-9]+: 67 66 0f 38 f6 00 adcx eax,DWORD PTR \[eax\] 15 [ ]*[a-f0-9]+: 66 0f 38 f6 ca adcx ecx,edx 16 [ ]*[a-f0-9]+: 67 66 0f 38 f6 00 adcx eax,DWORD PTR \[eax\] 17 [ ]*[a-f0-9]+: 66 4c 0f 38 f6 99 90 01 00 00 adcx r11,QWORD PTR \[rcx\+0x190\] 18 [ ]*[a-f0-9]+: 66 4d 0f 38 f6 e6 adcx r12,r14 19 [ ]*[a-f0-9]+: 67 66 48 0f 38 f6 94 f4 0f 04 f6 ff adcx rdx,QWORD PTR \[esp\+esi\*8-0x9fbf1\ [all...] |
x86-64-adx.d | 10 [ ]*[a-f0-9]+: 67 66 0f 38 f6 81 90 01 00 00 adcx 0x190\(%ecx\),%eax 11 [ ]*[a-f0-9]+: 66 0f 38 f6 ca adcx %edx,%ecx 12 [ ]*[a-f0-9]+: 67 66 0f 38 f6 94 f4 0f 04 f6 ff adcx -0x9fbf1\(%esp,%esi,8\),%edx 13 [ ]*[a-f0-9]+: 67 66 0f 38 f6 00 adcx \(%eax\),%eax 14 [ ]*[a-f0-9]+: 66 0f 38 f6 ca adcx %edx,%ecx 15 [ ]*[a-f0-9]+: 67 66 0f 38 f6 00 adcx \(%eax\),%eax 16 [ ]*[a-f0-9]+: 66 4c 0f 38 f6 99 90 01 00 00 adcx 0x190\(%rcx\),%r11 17 [ ]*[a-f0-9]+: 66 4d 0f 38 f6 e6 adcx %r14,%r12 18 [ ]*[a-f0-9]+: 67 66 48 0f 38 f6 94 f4 0f 04 f6 ff adcx -0x9fbf1\(%esp,%esi,8\),%rd [all...] |
adx-intel.d | 11 [ ]*[a-f0-9]+: 66 0f 38 f6 81 90 01 00 00 adcx eax,DWORD PTR \[ecx\+0x190\] 12 [ ]*[a-f0-9]+: 66 0f 38 f6 ca adcx ecx,edx 13 [ ]*[a-f0-9]+: 66 0f 38 f6 94 f4 0f 04 f6 ff adcx edx,DWORD PTR \[esp\+esi\*8-0x9fbf1\] 14 [ ]*[a-f0-9]+: 66 0f 38 f6 00 adcx eax,DWORD PTR \[eax\] 15 [ ]*[a-f0-9]+: 66 0f 38 f6 ca adcx ecx,edx 16 [ ]*[a-f0-9]+: 66 0f 38 f6 00 adcx eax,DWORD PTR \[eax\] 17 [ ]*[a-f0-9]+: f3 0f 38 f6 81 90 01 00 00 adox eax,DWORD PTR \[ecx\+0x190\] 18 [ ]*[a-f0-9]+: f3 0f 38 f6 ca adox ecx,edx 19 [ ]*[a-f0-9]+: f3 0f 38 f6 94 f4 0f 04 f6 ff adox edx,DWORD PTR \[esp\+esi\*8-0x9fbf1\ [all...] |
adx.d | 10 [ ]*[a-f0-9]+: 66 0f 38 f6 81 90 01 00 00 adcx 0x190\(%ecx\),%eax 11 [ ]*[a-f0-9]+: 66 0f 38 f6 ca adcx %edx,%ecx 12 [ ]*[a-f0-9]+: 66 0f 38 f6 94 f4 0f 04 f6 ff adcx -0x9fbf1\(%esp,%esi,8\),%edx 13 [ ]*[a-f0-9]+: 66 0f 38 f6 00 adcx \(%eax\),%eax 14 [ ]*[a-f0-9]+: 66 0f 38 f6 ca adcx %edx,%ecx 15 [ ]*[a-f0-9]+: 66 0f 38 f6 00 adcx \(%eax\),%eax 16 [ ]*[a-f0-9]+: f3 0f 38 f6 81 90 01 00 00 adox 0x190\(%ecx\),%eax 17 [ ]*[a-f0-9]+: f3 0f 38 f6 ca adox %edx,%ecx 18 [ ]*[a-f0-9]+: f3 0f 38 f6 94 f4 0f 04 f6 ff adox -0x9fbf1\(%esp,%esi,8\),%ed [all...] |
/external/llvm/test/MC/Mips/ |
micromips-fpu-instructions.s | 12 # CHECK-EL: add.s $f4, $f6, $f8 # encoding: [0x06,0x55,0x30,0x20] 13 # CHECK-EL: add.d $f4, $f6, $f8 # encoding: [0x06,0x55,0x30,0x21] 14 # CHECK-EL: div.s $f4, $f6, $f8 # encoding: [0x06,0x55,0xf0,0x20] 15 # CHECK-EL: div.d $f4, $f6, $f8 # encoding: [0x06,0x55,0xf0,0x21] 16 # CHECK-EL: mul.s $f4, $f6, $f8 # encoding: [0x06,0x55,0xb0,0x20] 17 # CHECK-EL: mul.d $f4, $f6, $f8 # encoding: [0x06,0x55,0xb0,0x21] 18 # CHECK-EL: sub.s $f4, $f6, $f8 # encoding: [0x06,0x55,0x70,0x20] 19 # CHECK-EL: sub.d $f4, $f6, $f8 # encoding: [0x06,0x55,0x70,0x21] 30 # CHECK-EL: ceil.w.s $f6, $f8 # encoding: [0xc8,0x54,0x3b,0x1b] 31 # CHECK-EL: ceil.w.d $f6, $f8 # encoding: [0xc8,0x54,0x3b,0x5b [all...] |
mips-fpu-instructions.s | 10 # CHECK: abs.s $f6, $f7 # encoding: [0x85,0x39,0x00,0x46] 12 # CHECK: add.s $f9, $f6, $f7 # encoding: [0x40,0x32,0x07,0x46] 14 # CHECK: floor.w.s $f6, $f7 # encoding: [0x8f,0x39,0x00,0x46] 16 # CHECK: ceil.w.s $f6, $f7 # encoding: [0x8e,0x39,0x00,0x46] 18 # CHECK: mul.s $f9, $f6, $f7 # encoding: [0x42,0x32,0x07,0x46] 20 # CHECK: neg.s $f6, $f7 # encoding: [0x87,0x39,0x00,0x46] 22 # CHECK: round.w.s $f6, $f7 # encoding: [0x8c,0x39,0x00,0x46] 24 # CHECK: sqrt.s $f6, $f7 # encoding: [0x84,0x39,0x00,0x46] 26 # CHECK: sub.s $f9, $f6, $f7 # encoding: [0x41,0x32,0x07,0x46] 28 # CHECK: trunc.w.s $f6, $f7 # encoding: [0x8d,0x39,0x00,0x46 [all...] |
/external/clang/test/CodeGen/ |
inline2.c | 29 // CHECK-GNU89-LABEL: define i32 @f6() 30 // CHECK-C99-LABEL: define i32 @f6() 31 inline int f6(void); 32 extern inline int f6(void) { return 0; } function 65 return f0() + f1() + f2() + f3() + f4() + f5() + f6() + f7() + f8() + f9()
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/external/clang/test/CoverageMapping/ |
unused_function.cpp | 33 // CHECK: {{_Z2f6v|\?f6@@YAXXZ}}: 35 inline void f6()
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/external/valgrind/none/tests/mips32/ |
MoveIns.c | 289 TESTINSNMOVE("mfc1 $t7, $f6", 24, f6, t7); 318 TESTINSNMOVEt("mtc1 $t7, $f6", 24, f6, t7); 347 TESTINSNMOVE1s("mov.s $f5, $f6", 24, f5, f6); 348 TESTINSNMOVE1s("mov.s $f6, $f7", 28, f6, f7); 375 TESTINSNMOVE1d("mov.d $f4, $f6", 40, f4, f6); [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/ia64/ |
opc-f.s | 5 fma f4 = f5, f6, f7 6 fma.s0 f4 = f5, f6, f7 7 fma.s1 f4 = f5, f6, f7 8 fma.s2 f4 = f5, f6, f7 9 fma.s3 f4 = f5, f6, f7 11 fma.s f4 = f5, f6, f7 12 fma.s.s0 f4 = f5, f6, f7 13 fma.s.s1 f4 = f5, f6, f7 14 fma.s.s2 f4 = f5, f6, f7 15 fma.s.s3 f4 = f5, f6, f [all...] |