| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| fpr-names-32.d | 1 #objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,fpr-names=32
2 #name: MIPS FPR disassembly (32)
3 #source: fpr-names.s
5 # Check objdump's handling of -M fpr-names=foo options.
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| fpr-names-64.d | 1 #objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,fpr-names=64
2 #name: MIPS FPR disassembly (64)
3 #source: fpr-names.s
5 # Check objdump's handling of -M fpr-names=foo options.
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| fpr-names-n32.d | 1 #objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,fpr-names=n32
2 #name: MIPS FPR disassembly (n32)
3 #source: fpr-names.s
5 # Check objdump's handling of -M fpr-names=foo options.
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| fpr-names-numeric.d | 1 #objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,fpr-names=numeric
2 #name: MIPS FPR disassembly (numeric)
3 #source: fpr-names.s
5 # Check objdump's handling of -M fpr-names=foo options.
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| delay.d | 7 # insn's if the target fpr is used in the
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| nodelay.d | 8 # insn's if the target fpr is used in the immediatly
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| /toolchain/binutils/binutils-2.25/opcodes/ |
| moxie-dis.c | 30 static fprintf_ftype fpr; variable
51 fpr = info->fprintf_func;
69 fpr (stream, "%s", opcode->name);
72 fpr (stream, "%s\t%s", opcode->name,
76 fpr (stream, "%s\t%s, %s", opcode->name,
89 fpr (stream, "%s\t%s, 0x%x", opcode->name,
103 fpr (stream, "%s\t0x%x", opcode->name, imm);
116 fpr (stream, "%s\t", opcode->name);
122 fpr (stream, "%s\t(%s), %s", opcode->name,
126 fpr (stream, "%s\t%s, (%s)", opcode->name
[all...] |
| w65-dis.c | 30 static fprintf_ftype fpr; variable
49 fpr (stream, "0x%x", val);
53 fpr (stream, "%c", c);
71 fpr = info->fprintf_func;
80 fpr (stream, "%s", op->name);
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| /external/elfutils/backends/ |
| s390_initreg.c | 77 } fpr = { .d = user_regs.regs.fp_regs.fprs[u] };
78 dwarf_regs[u] = fpr.w;
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| /art/runtime/gc/allocator/ |
| rosalloc.cc | 134 FreePageRun* fpr = *it; local
135 DCHECK(fpr->IsFree());
136 size_t fpr_byte_size = fpr->ByteSize(this);
143 << std::hex << reinterpret_cast<intptr_t>(fpr)
149 reinterpret_cast<FreePageRun*>(reinterpret_cast<uint8_t*>(fpr) + req_byte_size);
162 fpr->SetByteSize(this, req_byte_size);
163 DCHECK_EQ(fpr->ByteSize(this) % kPageSize, static_cast<size_t>(0));
165 res = fpr;
232 FreePageRun* fpr = *it; local
235 DCHECK_EQ(last_free_page_run, fpr);
356 FreePageRun* fpr = reinterpret_cast<FreePageRun*>(ptr); local
1220 FreePageRun* fpr = reinterpret_cast<FreePageRun*>(base_ + i * kPageSize); local
1411 FreePageRun* fpr = reinterpret_cast<FreePageRun*>(base_ + i * kPageSize); local
1760 FreePageRun* fpr = reinterpret_cast<FreePageRun*>(base_ + i * kPageSize); local
2003 FreePageRun* fpr = reinterpret_cast<FreePageRun*>(base_ + i * kPageSize); local
[all...] |
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/r10/platforms/android-12/arch-mips/usr/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/r10/platforms/android-13/arch-mips/usr/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/r10/platforms/android-14/arch-mips/usr/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/r10/platforms/android-15/arch-mips/usr/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/r10/platforms/android-16/arch-mips/usr/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/r10/platforms/android-17/arch-mips/usr/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/r10/platforms/android-18/arch-mips/usr/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/r10/platforms/android-19/arch-mips/usr/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/r10/platforms/android-9/arch-mips/usr/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/r11/platforms/android-12/arch-mips/usr/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/r11/platforms/android-13/arch-mips/usr/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/r11/platforms/android-14/arch-mips/usr/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/r11/platforms/android-15/arch-mips/usr/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
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| /prebuilts/ndk/r11/platforms/android-16/arch-mips/usr/include/asm/ |
| processor.h | 40 fpureg_t fpr[NUM_FPU_REGS]; member in struct:mips_fpu_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
