1 /* 2 * Copyright (C) 2011 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #include "assembler_x86.h" 18 19 #include "base/casts.h" 20 #include "entrypoints/quick/quick_entrypoints.h" 21 #include "memory_region.h" 22 #include "thread.h" 23 24 namespace art { 25 namespace x86 { 26 27 std::ostream& operator<<(std::ostream& os, const XmmRegister& reg) { 28 return os << "XMM" << static_cast<int>(reg); 29 } 30 31 std::ostream& operator<<(std::ostream& os, const X87Register& reg) { 32 return os << "ST" << static_cast<int>(reg); 33 } 34 35 void X86Assembler::call(Register reg) { 36 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 37 EmitUint8(0xFF); 38 EmitRegisterOperand(2, reg); 39 } 40 41 42 void X86Assembler::call(const Address& address) { 43 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 44 EmitUint8(0xFF); 45 EmitOperand(2, address); 46 } 47 48 49 void X86Assembler::call(Label* label) { 50 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 51 EmitUint8(0xE8); 52 static const int kSize = 5; 53 // Offset by one because we already have emitted the opcode. 54 EmitLabel(label, kSize - 1); 55 } 56 57 58 void X86Assembler::call(const ExternalLabel& label) { 59 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 60 intptr_t call_start = buffer_.GetPosition(); 61 EmitUint8(0xE8); 62 EmitInt32(label.address()); 63 static const intptr_t kCallExternalLabelSize = 5; 64 DCHECK_EQ((buffer_.GetPosition() - call_start), kCallExternalLabelSize); 65 } 66 67 68 void X86Assembler::pushl(Register reg) { 69 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 70 EmitUint8(0x50 + reg); 71 } 72 73 74 void X86Assembler::pushl(const Address& address) { 75 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 76 EmitUint8(0xFF); 77 EmitOperand(6, address); 78 } 79 80 81 void X86Assembler::pushl(const Immediate& imm) { 82 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 83 if (imm.is_int8()) { 84 EmitUint8(0x6A); 85 EmitUint8(imm.value() & 0xFF); 86 } else { 87 EmitUint8(0x68); 88 EmitImmediate(imm); 89 } 90 } 91 92 93 void X86Assembler::popl(Register reg) { 94 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 95 EmitUint8(0x58 + reg); 96 } 97 98 99 void X86Assembler::popl(const Address& address) { 100 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 101 EmitUint8(0x8F); 102 EmitOperand(0, address); 103 } 104 105 106 void X86Assembler::movl(Register dst, const Immediate& imm) { 107 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 108 EmitUint8(0xB8 + dst); 109 EmitImmediate(imm); 110 } 111 112 113 void X86Assembler::movl(Register dst, Register src) { 114 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 115 EmitUint8(0x89); 116 EmitRegisterOperand(src, dst); 117 } 118 119 120 void X86Assembler::movl(Register dst, const Address& src) { 121 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 122 EmitUint8(0x8B); 123 EmitOperand(dst, src); 124 } 125 126 127 void X86Assembler::movl(const Address& dst, Register src) { 128 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 129 EmitUint8(0x89); 130 EmitOperand(src, dst); 131 } 132 133 134 void X86Assembler::movl(const Address& dst, const Immediate& imm) { 135 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 136 EmitUint8(0xC7); 137 EmitOperand(0, dst); 138 EmitImmediate(imm); 139 } 140 141 void X86Assembler::movl(const Address& dst, Label* lbl) { 142 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 143 EmitUint8(0xC7); 144 EmitOperand(0, dst); 145 EmitLabel(lbl, dst.length_ + 5); 146 } 147 148 void X86Assembler::movntl(const Address& dst, Register src) { 149 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 150 EmitUint8(0x0F); 151 EmitUint8(0xC3); 152 EmitOperand(src, dst); 153 } 154 155 void X86Assembler::bswapl(Register dst) { 156 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 157 EmitUint8(0x0F); 158 EmitUint8(0xC8 + dst); 159 } 160 161 void X86Assembler::bsfl(Register dst, Register src) { 162 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 163 EmitUint8(0x0F); 164 EmitUint8(0xBC); 165 EmitRegisterOperand(dst, src); 166 } 167 168 void X86Assembler::bsfl(Register dst, const Address& src) { 169 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 170 EmitUint8(0x0F); 171 EmitUint8(0xBC); 172 EmitOperand(dst, src); 173 } 174 175 void X86Assembler::bsrl(Register dst, Register src) { 176 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 177 EmitUint8(0x0F); 178 EmitUint8(0xBD); 179 EmitRegisterOperand(dst, src); 180 } 181 182 void X86Assembler::bsrl(Register dst, const Address& src) { 183 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 184 EmitUint8(0x0F); 185 EmitUint8(0xBD); 186 EmitOperand(dst, src); 187 } 188 189 void X86Assembler::popcntl(Register dst, Register src) { 190 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 191 EmitUint8(0xF3); 192 EmitUint8(0x0F); 193 EmitUint8(0xB8); 194 EmitRegisterOperand(dst, src); 195 } 196 197 void X86Assembler::popcntl(Register dst, const Address& src) { 198 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 199 EmitUint8(0xF3); 200 EmitUint8(0x0F); 201 EmitUint8(0xB8); 202 EmitOperand(dst, src); 203 } 204 205 void X86Assembler::movzxb(Register dst, ByteRegister src) { 206 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 207 EmitUint8(0x0F); 208 EmitUint8(0xB6); 209 EmitRegisterOperand(dst, src); 210 } 211 212 213 void X86Assembler::movzxb(Register dst, const Address& src) { 214 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 215 EmitUint8(0x0F); 216 EmitUint8(0xB6); 217 EmitOperand(dst, src); 218 } 219 220 221 void X86Assembler::movsxb(Register dst, ByteRegister src) { 222 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 223 EmitUint8(0x0F); 224 EmitUint8(0xBE); 225 EmitRegisterOperand(dst, src); 226 } 227 228 229 void X86Assembler::movsxb(Register dst, const Address& src) { 230 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 231 EmitUint8(0x0F); 232 EmitUint8(0xBE); 233 EmitOperand(dst, src); 234 } 235 236 237 void X86Assembler::movb(Register /*dst*/, const Address& /*src*/) { 238 LOG(FATAL) << "Use movzxb or movsxb instead."; 239 } 240 241 242 void X86Assembler::movb(const Address& dst, ByteRegister src) { 243 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 244 EmitUint8(0x88); 245 EmitOperand(src, dst); 246 } 247 248 249 void X86Assembler::movb(const Address& dst, const Immediate& imm) { 250 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 251 EmitUint8(0xC6); 252 EmitOperand(EAX, dst); 253 CHECK(imm.is_int8()); 254 EmitUint8(imm.value() & 0xFF); 255 } 256 257 258 void X86Assembler::movzxw(Register dst, Register src) { 259 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 260 EmitUint8(0x0F); 261 EmitUint8(0xB7); 262 EmitRegisterOperand(dst, src); 263 } 264 265 266 void X86Assembler::movzxw(Register dst, const Address& src) { 267 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 268 EmitUint8(0x0F); 269 EmitUint8(0xB7); 270 EmitOperand(dst, src); 271 } 272 273 274 void X86Assembler::movsxw(Register dst, Register src) { 275 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 276 EmitUint8(0x0F); 277 EmitUint8(0xBF); 278 EmitRegisterOperand(dst, src); 279 } 280 281 282 void X86Assembler::movsxw(Register dst, const Address& src) { 283 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 284 EmitUint8(0x0F); 285 EmitUint8(0xBF); 286 EmitOperand(dst, src); 287 } 288 289 290 void X86Assembler::movw(Register /*dst*/, const Address& /*src*/) { 291 LOG(FATAL) << "Use movzxw or movsxw instead."; 292 } 293 294 295 void X86Assembler::movw(const Address& dst, Register src) { 296 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 297 EmitOperandSizeOverride(); 298 EmitUint8(0x89); 299 EmitOperand(src, dst); 300 } 301 302 303 void X86Assembler::movw(const Address& dst, const Immediate& imm) { 304 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 305 EmitOperandSizeOverride(); 306 EmitUint8(0xC7); 307 EmitOperand(0, dst); 308 CHECK(imm.is_uint16() || imm.is_int16()); 309 EmitUint8(imm.value() & 0xFF); 310 EmitUint8(imm.value() >> 8); 311 } 312 313 314 void X86Assembler::leal(Register dst, const Address& src) { 315 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 316 EmitUint8(0x8D); 317 EmitOperand(dst, src); 318 } 319 320 321 void X86Assembler::cmovl(Condition condition, Register dst, Register src) { 322 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 323 EmitUint8(0x0F); 324 EmitUint8(0x40 + condition); 325 EmitRegisterOperand(dst, src); 326 } 327 328 329 void X86Assembler::cmovl(Condition condition, Register dst, const Address& src) { 330 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 331 EmitUint8(0x0F); 332 EmitUint8(0x40 + condition); 333 EmitOperand(dst, src); 334 } 335 336 337 void X86Assembler::setb(Condition condition, Register dst) { 338 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 339 EmitUint8(0x0F); 340 EmitUint8(0x90 + condition); 341 EmitOperand(0, Operand(dst)); 342 } 343 344 345 void X86Assembler::movaps(XmmRegister dst, XmmRegister src) { 346 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 347 EmitUint8(0x0F); 348 EmitUint8(0x28); 349 EmitXmmRegisterOperand(dst, src); 350 } 351 352 353 void X86Assembler::movaps(XmmRegister dst, const Address& src) { 354 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 355 EmitUint8(0x0F); 356 EmitUint8(0x28); 357 EmitOperand(dst, src); 358 } 359 360 361 void X86Assembler::movups(XmmRegister dst, const Address& src) { 362 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 363 EmitUint8(0x0F); 364 EmitUint8(0x10); 365 EmitOperand(dst, src); 366 } 367 368 369 void X86Assembler::movaps(const Address& dst, XmmRegister src) { 370 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 371 EmitUint8(0x0F); 372 EmitUint8(0x29); 373 EmitOperand(src, dst); 374 } 375 376 377 void X86Assembler::movups(const Address& dst, XmmRegister src) { 378 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 379 EmitUint8(0x0F); 380 EmitUint8(0x11); 381 EmitOperand(src, dst); 382 } 383 384 385 void X86Assembler::movss(XmmRegister dst, const Address& src) { 386 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 387 EmitUint8(0xF3); 388 EmitUint8(0x0F); 389 EmitUint8(0x10); 390 EmitOperand(dst, src); 391 } 392 393 394 void X86Assembler::movss(const Address& dst, XmmRegister src) { 395 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 396 EmitUint8(0xF3); 397 EmitUint8(0x0F); 398 EmitUint8(0x11); 399 EmitOperand(src, dst); 400 } 401 402 403 void X86Assembler::movss(XmmRegister dst, XmmRegister src) { 404 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 405 EmitUint8(0xF3); 406 EmitUint8(0x0F); 407 EmitUint8(0x11); 408 EmitXmmRegisterOperand(src, dst); 409 } 410 411 412 void X86Assembler::movd(XmmRegister dst, Register src) { 413 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 414 EmitUint8(0x66); 415 EmitUint8(0x0F); 416 EmitUint8(0x6E); 417 EmitOperand(dst, Operand(src)); 418 } 419 420 421 void X86Assembler::movd(Register dst, XmmRegister src) { 422 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 423 EmitUint8(0x66); 424 EmitUint8(0x0F); 425 EmitUint8(0x7E); 426 EmitOperand(src, Operand(dst)); 427 } 428 429 430 void X86Assembler::addss(XmmRegister dst, XmmRegister src) { 431 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 432 EmitUint8(0xF3); 433 EmitUint8(0x0F); 434 EmitUint8(0x58); 435 EmitXmmRegisterOperand(dst, src); 436 } 437 438 439 void X86Assembler::addss(XmmRegister dst, const Address& src) { 440 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 441 EmitUint8(0xF3); 442 EmitUint8(0x0F); 443 EmitUint8(0x58); 444 EmitOperand(dst, src); 445 } 446 447 448 void X86Assembler::subss(XmmRegister dst, XmmRegister src) { 449 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 450 EmitUint8(0xF3); 451 EmitUint8(0x0F); 452 EmitUint8(0x5C); 453 EmitXmmRegisterOperand(dst, src); 454 } 455 456 457 void X86Assembler::subss(XmmRegister dst, const Address& src) { 458 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 459 EmitUint8(0xF3); 460 EmitUint8(0x0F); 461 EmitUint8(0x5C); 462 EmitOperand(dst, src); 463 } 464 465 466 void X86Assembler::mulss(XmmRegister dst, XmmRegister src) { 467 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 468 EmitUint8(0xF3); 469 EmitUint8(0x0F); 470 EmitUint8(0x59); 471 EmitXmmRegisterOperand(dst, src); 472 } 473 474 475 void X86Assembler::mulss(XmmRegister dst, const Address& src) { 476 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 477 EmitUint8(0xF3); 478 EmitUint8(0x0F); 479 EmitUint8(0x59); 480 EmitOperand(dst, src); 481 } 482 483 484 void X86Assembler::divss(XmmRegister dst, XmmRegister src) { 485 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 486 EmitUint8(0xF3); 487 EmitUint8(0x0F); 488 EmitUint8(0x5E); 489 EmitXmmRegisterOperand(dst, src); 490 } 491 492 493 void X86Assembler::divss(XmmRegister dst, const Address& src) { 494 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 495 EmitUint8(0xF3); 496 EmitUint8(0x0F); 497 EmitUint8(0x5E); 498 EmitOperand(dst, src); 499 } 500 501 502 void X86Assembler::addps(XmmRegister dst, XmmRegister src) { 503 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 504 EmitUint8(0x0F); 505 EmitUint8(0x58); 506 EmitXmmRegisterOperand(dst, src); 507 } 508 509 510 void X86Assembler::subps(XmmRegister dst, XmmRegister src) { 511 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 512 EmitUint8(0x0F); 513 EmitUint8(0x5C); 514 EmitXmmRegisterOperand(dst, src); 515 } 516 517 518 void X86Assembler::mulps(XmmRegister dst, XmmRegister src) { 519 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 520 EmitUint8(0x0F); 521 EmitUint8(0x59); 522 EmitXmmRegisterOperand(dst, src); 523 } 524 525 526 void X86Assembler::divps(XmmRegister dst, XmmRegister src) { 527 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 528 EmitUint8(0x0F); 529 EmitUint8(0x5E); 530 EmitXmmRegisterOperand(dst, src); 531 } 532 533 534 void X86Assembler::movapd(XmmRegister dst, XmmRegister src) { 535 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 536 EmitUint8(0x66); 537 EmitUint8(0x0F); 538 EmitUint8(0x28); 539 EmitXmmRegisterOperand(dst, src); 540 } 541 542 543 void X86Assembler::movapd(XmmRegister dst, const Address& src) { 544 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 545 EmitUint8(0x66); 546 EmitUint8(0x0F); 547 EmitUint8(0x28); 548 EmitOperand(dst, src); 549 } 550 551 552 void X86Assembler::movupd(XmmRegister dst, const Address& src) { 553 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 554 EmitUint8(0x66); 555 EmitUint8(0x0F); 556 EmitUint8(0x10); 557 EmitOperand(dst, src); 558 } 559 560 561 void X86Assembler::movapd(const Address& dst, XmmRegister src) { 562 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 563 EmitUint8(0x66); 564 EmitUint8(0x0F); 565 EmitUint8(0x29); 566 EmitOperand(src, dst); 567 } 568 569 570 void X86Assembler::movupd(const Address& dst, XmmRegister src) { 571 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 572 EmitUint8(0x66); 573 EmitUint8(0x0F); 574 EmitUint8(0x11); 575 EmitOperand(src, dst); 576 } 577 578 579 void X86Assembler::flds(const Address& src) { 580 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 581 EmitUint8(0xD9); 582 EmitOperand(0, src); 583 } 584 585 586 void X86Assembler::fsts(const Address& dst) { 587 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 588 EmitUint8(0xD9); 589 EmitOperand(2, dst); 590 } 591 592 593 void X86Assembler::fstps(const Address& dst) { 594 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 595 EmitUint8(0xD9); 596 EmitOperand(3, dst); 597 } 598 599 600 void X86Assembler::movsd(XmmRegister dst, const Address& src) { 601 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 602 EmitUint8(0xF2); 603 EmitUint8(0x0F); 604 EmitUint8(0x10); 605 EmitOperand(dst, src); 606 } 607 608 609 void X86Assembler::movsd(const Address& dst, XmmRegister src) { 610 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 611 EmitUint8(0xF2); 612 EmitUint8(0x0F); 613 EmitUint8(0x11); 614 EmitOperand(src, dst); 615 } 616 617 618 void X86Assembler::movsd(XmmRegister dst, XmmRegister src) { 619 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 620 EmitUint8(0xF2); 621 EmitUint8(0x0F); 622 EmitUint8(0x11); 623 EmitXmmRegisterOperand(src, dst); 624 } 625 626 627 void X86Assembler::movhpd(XmmRegister dst, const Address& src) { 628 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 629 EmitUint8(0x66); 630 EmitUint8(0x0F); 631 EmitUint8(0x16); 632 EmitOperand(dst, src); 633 } 634 635 636 void X86Assembler::movhpd(const Address& dst, XmmRegister src) { 637 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 638 EmitUint8(0x66); 639 EmitUint8(0x0F); 640 EmitUint8(0x17); 641 EmitOperand(src, dst); 642 } 643 644 645 void X86Assembler::addsd(XmmRegister dst, XmmRegister src) { 646 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 647 EmitUint8(0xF2); 648 EmitUint8(0x0F); 649 EmitUint8(0x58); 650 EmitXmmRegisterOperand(dst, src); 651 } 652 653 654 void X86Assembler::addsd(XmmRegister dst, const Address& src) { 655 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 656 EmitUint8(0xF2); 657 EmitUint8(0x0F); 658 EmitUint8(0x58); 659 EmitOperand(dst, src); 660 } 661 662 663 void X86Assembler::subsd(XmmRegister dst, XmmRegister src) { 664 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 665 EmitUint8(0xF2); 666 EmitUint8(0x0F); 667 EmitUint8(0x5C); 668 EmitXmmRegisterOperand(dst, src); 669 } 670 671 672 void X86Assembler::subsd(XmmRegister dst, const Address& src) { 673 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 674 EmitUint8(0xF2); 675 EmitUint8(0x0F); 676 EmitUint8(0x5C); 677 EmitOperand(dst, src); 678 } 679 680 681 void X86Assembler::mulsd(XmmRegister dst, XmmRegister src) { 682 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 683 EmitUint8(0xF2); 684 EmitUint8(0x0F); 685 EmitUint8(0x59); 686 EmitXmmRegisterOperand(dst, src); 687 } 688 689 690 void X86Assembler::mulsd(XmmRegister dst, const Address& src) { 691 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 692 EmitUint8(0xF2); 693 EmitUint8(0x0F); 694 EmitUint8(0x59); 695 EmitOperand(dst, src); 696 } 697 698 699 void X86Assembler::divsd(XmmRegister dst, XmmRegister src) { 700 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 701 EmitUint8(0xF2); 702 EmitUint8(0x0F); 703 EmitUint8(0x5E); 704 EmitXmmRegisterOperand(dst, src); 705 } 706 707 708 void X86Assembler::divsd(XmmRegister dst, const Address& src) { 709 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 710 EmitUint8(0xF2); 711 EmitUint8(0x0F); 712 EmitUint8(0x5E); 713 EmitOperand(dst, src); 714 } 715 716 717 void X86Assembler::addpd(XmmRegister dst, XmmRegister src) { 718 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 719 EmitUint8(0x66); 720 EmitUint8(0x0F); 721 EmitUint8(0x58); 722 EmitXmmRegisterOperand(dst, src); 723 } 724 725 726 void X86Assembler::subpd(XmmRegister dst, XmmRegister src) { 727 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 728 EmitUint8(0x66); 729 EmitUint8(0x0F); 730 EmitUint8(0x5C); 731 EmitXmmRegisterOperand(dst, src); 732 } 733 734 735 void X86Assembler::mulpd(XmmRegister dst, XmmRegister src) { 736 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 737 EmitUint8(0x66); 738 EmitUint8(0x0F); 739 EmitUint8(0x59); 740 EmitXmmRegisterOperand(dst, src); 741 } 742 743 744 void X86Assembler::divpd(XmmRegister dst, XmmRegister src) { 745 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 746 EmitUint8(0x66); 747 EmitUint8(0x0F); 748 EmitUint8(0x5E); 749 EmitXmmRegisterOperand(dst, src); 750 } 751 752 753 void X86Assembler::movdqa(XmmRegister dst, XmmRegister src) { 754 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 755 EmitUint8(0x66); 756 EmitUint8(0x0F); 757 EmitUint8(0x6F); 758 EmitXmmRegisterOperand(dst, src); 759 } 760 761 762 void X86Assembler::movdqa(XmmRegister dst, const Address& src) { 763 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 764 EmitUint8(0x66); 765 EmitUint8(0x0F); 766 EmitUint8(0x6F); 767 EmitOperand(dst, src); 768 } 769 770 771 void X86Assembler::movdqu(XmmRegister dst, const Address& src) { 772 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 773 EmitUint8(0xF3); 774 EmitUint8(0x0F); 775 EmitUint8(0x6F); 776 EmitOperand(dst, src); 777 } 778 779 780 void X86Assembler::movdqa(const Address& dst, XmmRegister src) { 781 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 782 EmitUint8(0x66); 783 EmitUint8(0x0F); 784 EmitUint8(0x7F); 785 EmitOperand(src, dst); 786 } 787 788 789 void X86Assembler::movdqu(const Address& dst, XmmRegister src) { 790 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 791 EmitUint8(0xF3); 792 EmitUint8(0x0F); 793 EmitUint8(0x7F); 794 EmitOperand(src, dst); 795 } 796 797 798 void X86Assembler::paddb(XmmRegister dst, XmmRegister src) { 799 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 800 EmitUint8(0x66); 801 EmitUint8(0x0F); 802 EmitUint8(0xFC); 803 EmitXmmRegisterOperand(dst, src); 804 } 805 806 807 void X86Assembler::psubb(XmmRegister dst, XmmRegister src) { 808 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 809 EmitUint8(0x66); 810 EmitUint8(0x0F); 811 EmitUint8(0xF8); 812 EmitXmmRegisterOperand(dst, src); 813 } 814 815 816 void X86Assembler::paddw(XmmRegister dst, XmmRegister src) { 817 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 818 EmitUint8(0x66); 819 EmitUint8(0x0F); 820 EmitUint8(0xFD); 821 EmitXmmRegisterOperand(dst, src); 822 } 823 824 825 void X86Assembler::psubw(XmmRegister dst, XmmRegister src) { 826 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 827 EmitUint8(0x66); 828 EmitUint8(0x0F); 829 EmitUint8(0xF9); 830 EmitXmmRegisterOperand(dst, src); 831 } 832 833 834 void X86Assembler::pmullw(XmmRegister dst, XmmRegister src) { 835 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 836 EmitUint8(0x66); 837 EmitUint8(0x0F); 838 EmitUint8(0xD5); 839 EmitXmmRegisterOperand(dst, src); 840 } 841 842 843 void X86Assembler::paddd(XmmRegister dst, XmmRegister src) { 844 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 845 EmitUint8(0x66); 846 EmitUint8(0x0F); 847 EmitUint8(0xFE); 848 EmitXmmRegisterOperand(dst, src); 849 } 850 851 852 void X86Assembler::psubd(XmmRegister dst, XmmRegister src) { 853 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 854 EmitUint8(0x66); 855 EmitUint8(0x0F); 856 EmitUint8(0xFA); 857 EmitXmmRegisterOperand(dst, src); 858 } 859 860 861 void X86Assembler::pmulld(XmmRegister dst, XmmRegister src) { 862 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 863 EmitUint8(0x66); 864 EmitUint8(0x0F); 865 EmitUint8(0x38); 866 EmitUint8(0x40); 867 EmitXmmRegisterOperand(dst, src); 868 } 869 870 871 void X86Assembler::paddq(XmmRegister dst, XmmRegister src) { 872 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 873 EmitUint8(0x66); 874 EmitUint8(0x0F); 875 EmitUint8(0xD4); 876 EmitXmmRegisterOperand(dst, src); 877 } 878 879 880 void X86Assembler::psubq(XmmRegister dst, XmmRegister src) { 881 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 882 EmitUint8(0x66); 883 EmitUint8(0x0F); 884 EmitUint8(0xFB); 885 EmitXmmRegisterOperand(dst, src); 886 } 887 888 889 void X86Assembler::cvtsi2ss(XmmRegister dst, Register src) { 890 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 891 EmitUint8(0xF3); 892 EmitUint8(0x0F); 893 EmitUint8(0x2A); 894 EmitOperand(dst, Operand(src)); 895 } 896 897 898 void X86Assembler::cvtsi2sd(XmmRegister dst, Register src) { 899 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 900 EmitUint8(0xF2); 901 EmitUint8(0x0F); 902 EmitUint8(0x2A); 903 EmitOperand(dst, Operand(src)); 904 } 905 906 907 void X86Assembler::cvtss2si(Register dst, XmmRegister src) { 908 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 909 EmitUint8(0xF3); 910 EmitUint8(0x0F); 911 EmitUint8(0x2D); 912 EmitXmmRegisterOperand(dst, src); 913 } 914 915 916 void X86Assembler::cvtss2sd(XmmRegister dst, XmmRegister src) { 917 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 918 EmitUint8(0xF3); 919 EmitUint8(0x0F); 920 EmitUint8(0x5A); 921 EmitXmmRegisterOperand(dst, src); 922 } 923 924 925 void X86Assembler::cvtsd2si(Register dst, XmmRegister src) { 926 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 927 EmitUint8(0xF2); 928 EmitUint8(0x0F); 929 EmitUint8(0x2D); 930 EmitXmmRegisterOperand(dst, src); 931 } 932 933 934 void X86Assembler::cvttss2si(Register dst, XmmRegister src) { 935 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 936 EmitUint8(0xF3); 937 EmitUint8(0x0F); 938 EmitUint8(0x2C); 939 EmitXmmRegisterOperand(dst, src); 940 } 941 942 943 void X86Assembler::cvttsd2si(Register dst, XmmRegister src) { 944 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 945 EmitUint8(0xF2); 946 EmitUint8(0x0F); 947 EmitUint8(0x2C); 948 EmitXmmRegisterOperand(dst, src); 949 } 950 951 952 void X86Assembler::cvtsd2ss(XmmRegister dst, XmmRegister src) { 953 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 954 EmitUint8(0xF2); 955 EmitUint8(0x0F); 956 EmitUint8(0x5A); 957 EmitXmmRegisterOperand(dst, src); 958 } 959 960 961 void X86Assembler::cvtdq2ps(XmmRegister dst, XmmRegister src) { 962 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 963 EmitUint8(0x0F); 964 EmitUint8(0x5B); 965 EmitXmmRegisterOperand(dst, src); 966 } 967 968 969 void X86Assembler::cvtdq2pd(XmmRegister dst, XmmRegister src) { 970 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 971 EmitUint8(0xF3); 972 EmitUint8(0x0F); 973 EmitUint8(0xE6); 974 EmitXmmRegisterOperand(dst, src); 975 } 976 977 978 void X86Assembler::comiss(XmmRegister a, XmmRegister b) { 979 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 980 EmitUint8(0x0F); 981 EmitUint8(0x2F); 982 EmitXmmRegisterOperand(a, b); 983 } 984 985 986 void X86Assembler::comiss(XmmRegister a, const Address& b) { 987 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 988 EmitUint8(0x0F); 989 EmitUint8(0x2F); 990 EmitOperand(a, b); 991 } 992 993 994 void X86Assembler::comisd(XmmRegister a, XmmRegister b) { 995 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 996 EmitUint8(0x66); 997 EmitUint8(0x0F); 998 EmitUint8(0x2F); 999 EmitXmmRegisterOperand(a, b); 1000 } 1001 1002 1003 void X86Assembler::comisd(XmmRegister a, const Address& b) { 1004 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1005 EmitUint8(0x66); 1006 EmitUint8(0x0F); 1007 EmitUint8(0x2F); 1008 EmitOperand(a, b); 1009 } 1010 1011 1012 void X86Assembler::ucomiss(XmmRegister a, XmmRegister b) { 1013 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1014 EmitUint8(0x0F); 1015 EmitUint8(0x2E); 1016 EmitXmmRegisterOperand(a, b); 1017 } 1018 1019 1020 void X86Assembler::ucomiss(XmmRegister a, const Address& b) { 1021 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1022 EmitUint8(0x0F); 1023 EmitUint8(0x2E); 1024 EmitOperand(a, b); 1025 } 1026 1027 1028 void X86Assembler::ucomisd(XmmRegister a, XmmRegister b) { 1029 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1030 EmitUint8(0x66); 1031 EmitUint8(0x0F); 1032 EmitUint8(0x2E); 1033 EmitXmmRegisterOperand(a, b); 1034 } 1035 1036 1037 void X86Assembler::ucomisd(XmmRegister a, const Address& b) { 1038 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1039 EmitUint8(0x66); 1040 EmitUint8(0x0F); 1041 EmitUint8(0x2E); 1042 EmitOperand(a, b); 1043 } 1044 1045 1046 void X86Assembler::roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm) { 1047 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1048 EmitUint8(0x66); 1049 EmitUint8(0x0F); 1050 EmitUint8(0x3A); 1051 EmitUint8(0x0B); 1052 EmitXmmRegisterOperand(dst, src); 1053 EmitUint8(imm.value()); 1054 } 1055 1056 1057 void X86Assembler::roundss(XmmRegister dst, XmmRegister src, const Immediate& imm) { 1058 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1059 EmitUint8(0x66); 1060 EmitUint8(0x0F); 1061 EmitUint8(0x3A); 1062 EmitUint8(0x0A); 1063 EmitXmmRegisterOperand(dst, src); 1064 EmitUint8(imm.value()); 1065 } 1066 1067 1068 void X86Assembler::sqrtsd(XmmRegister dst, XmmRegister src) { 1069 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1070 EmitUint8(0xF2); 1071 EmitUint8(0x0F); 1072 EmitUint8(0x51); 1073 EmitXmmRegisterOperand(dst, src); 1074 } 1075 1076 1077 void X86Assembler::sqrtss(XmmRegister dst, XmmRegister src) { 1078 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1079 EmitUint8(0xF3); 1080 EmitUint8(0x0F); 1081 EmitUint8(0x51); 1082 EmitXmmRegisterOperand(dst, src); 1083 } 1084 1085 1086 void X86Assembler::xorpd(XmmRegister dst, const Address& src) { 1087 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1088 EmitUint8(0x66); 1089 EmitUint8(0x0F); 1090 EmitUint8(0x57); 1091 EmitOperand(dst, src); 1092 } 1093 1094 1095 void X86Assembler::xorpd(XmmRegister dst, XmmRegister src) { 1096 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1097 EmitUint8(0x66); 1098 EmitUint8(0x0F); 1099 EmitUint8(0x57); 1100 EmitXmmRegisterOperand(dst, src); 1101 } 1102 1103 1104 void X86Assembler::xorps(XmmRegister dst, const Address& src) { 1105 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1106 EmitUint8(0x0F); 1107 EmitUint8(0x57); 1108 EmitOperand(dst, src); 1109 } 1110 1111 1112 void X86Assembler::xorps(XmmRegister dst, XmmRegister src) { 1113 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1114 EmitUint8(0x0F); 1115 EmitUint8(0x57); 1116 EmitXmmRegisterOperand(dst, src); 1117 } 1118 1119 1120 void X86Assembler::pxor(XmmRegister dst, XmmRegister src) { 1121 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1122 EmitUint8(0x66); 1123 EmitUint8(0x0F); 1124 EmitUint8(0xEF); 1125 EmitXmmRegisterOperand(dst, src); 1126 } 1127 1128 1129 void X86Assembler::andpd(XmmRegister dst, XmmRegister src) { 1130 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1131 EmitUint8(0x66); 1132 EmitUint8(0x0F); 1133 EmitUint8(0x54); 1134 EmitXmmRegisterOperand(dst, src); 1135 } 1136 1137 1138 void X86Assembler::andpd(XmmRegister dst, const Address& src) { 1139 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1140 EmitUint8(0x66); 1141 EmitUint8(0x0F); 1142 EmitUint8(0x54); 1143 EmitOperand(dst, src); 1144 } 1145 1146 1147 void X86Assembler::andps(XmmRegister dst, XmmRegister src) { 1148 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1149 EmitUint8(0x0F); 1150 EmitUint8(0x54); 1151 EmitXmmRegisterOperand(dst, src); 1152 } 1153 1154 1155 void X86Assembler::andps(XmmRegister dst, const Address& src) { 1156 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1157 EmitUint8(0x0F); 1158 EmitUint8(0x54); 1159 EmitOperand(dst, src); 1160 } 1161 1162 1163 void X86Assembler::pand(XmmRegister dst, XmmRegister src) { 1164 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1165 EmitUint8(0x66); 1166 EmitUint8(0x0F); 1167 EmitUint8(0xDB); 1168 EmitXmmRegisterOperand(dst, src); 1169 } 1170 1171 1172 void X86Assembler::andnpd(XmmRegister dst, XmmRegister src) { 1173 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1174 EmitUint8(0x66); 1175 EmitUint8(0x0F); 1176 EmitUint8(0x55); 1177 EmitXmmRegisterOperand(dst, src); 1178 } 1179 1180 1181 void X86Assembler::andnps(XmmRegister dst, XmmRegister src) { 1182 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1183 EmitUint8(0x0F); 1184 EmitUint8(0x55); 1185 EmitXmmRegisterOperand(dst, src); 1186 } 1187 1188 1189 void X86Assembler::pandn(XmmRegister dst, XmmRegister src) { 1190 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1191 EmitUint8(0x66); 1192 EmitUint8(0x0F); 1193 EmitUint8(0xDF); 1194 EmitXmmRegisterOperand(dst, src); 1195 } 1196 1197 1198 void X86Assembler::orpd(XmmRegister dst, XmmRegister src) { 1199 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1200 EmitUint8(0x66); 1201 EmitUint8(0x0F); 1202 EmitUint8(0x56); 1203 EmitXmmRegisterOperand(dst, src); 1204 } 1205 1206 1207 void X86Assembler::orps(XmmRegister dst, XmmRegister src) { 1208 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1209 EmitUint8(0x0F); 1210 EmitUint8(0x56); 1211 EmitXmmRegisterOperand(dst, src); 1212 } 1213 1214 1215 void X86Assembler::por(XmmRegister dst, XmmRegister src) { 1216 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1217 EmitUint8(0x66); 1218 EmitUint8(0x0F); 1219 EmitUint8(0xEB); 1220 EmitXmmRegisterOperand(dst, src); 1221 } 1222 1223 1224 void X86Assembler::pavgb(XmmRegister dst, XmmRegister src) { 1225 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1226 EmitUint8(0x66); 1227 EmitUint8(0x0F); 1228 EmitUint8(0xE0); 1229 EmitXmmRegisterOperand(dst, src); 1230 } 1231 1232 1233 void X86Assembler::pavgw(XmmRegister dst, XmmRegister src) { 1234 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1235 EmitUint8(0x66); 1236 EmitUint8(0x0F); 1237 EmitUint8(0xE3); 1238 EmitXmmRegisterOperand(dst, src); 1239 } 1240 1241 1242 void X86Assembler::pcmpeqb(XmmRegister dst, XmmRegister src) { 1243 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1244 EmitUint8(0x66); 1245 EmitUint8(0x0F); 1246 EmitUint8(0x74); 1247 EmitXmmRegisterOperand(dst, src); 1248 } 1249 1250 1251 void X86Assembler::pcmpeqw(XmmRegister dst, XmmRegister src) { 1252 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1253 EmitUint8(0x66); 1254 EmitUint8(0x0F); 1255 EmitUint8(0x75); 1256 EmitXmmRegisterOperand(dst, src); 1257 } 1258 1259 1260 void X86Assembler::pcmpeqd(XmmRegister dst, XmmRegister src) { 1261 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1262 EmitUint8(0x66); 1263 EmitUint8(0x0F); 1264 EmitUint8(0x76); 1265 EmitXmmRegisterOperand(dst, src); 1266 } 1267 1268 1269 void X86Assembler::pcmpeqq(XmmRegister dst, XmmRegister src) { 1270 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1271 EmitUint8(0x66); 1272 EmitUint8(0x0F); 1273 EmitUint8(0x38); 1274 EmitUint8(0x29); 1275 EmitXmmRegisterOperand(dst, src); 1276 } 1277 1278 1279 void X86Assembler::pcmpgtb(XmmRegister dst, XmmRegister src) { 1280 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1281 EmitUint8(0x66); 1282 EmitUint8(0x0F); 1283 EmitUint8(0x64); 1284 EmitXmmRegisterOperand(dst, src); 1285 } 1286 1287 1288 void X86Assembler::pcmpgtw(XmmRegister dst, XmmRegister src) { 1289 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1290 EmitUint8(0x66); 1291 EmitUint8(0x0F); 1292 EmitUint8(0x65); 1293 EmitXmmRegisterOperand(dst, src); 1294 } 1295 1296 1297 void X86Assembler::pcmpgtd(XmmRegister dst, XmmRegister src) { 1298 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1299 EmitUint8(0x66); 1300 EmitUint8(0x0F); 1301 EmitUint8(0x66); 1302 EmitXmmRegisterOperand(dst, src); 1303 } 1304 1305 1306 void X86Assembler::pcmpgtq(XmmRegister dst, XmmRegister src) { 1307 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1308 EmitUint8(0x66); 1309 EmitUint8(0x0F); 1310 EmitUint8(0x38); 1311 EmitUint8(0x37); 1312 EmitXmmRegisterOperand(dst, src); 1313 } 1314 1315 1316 void X86Assembler::shufpd(XmmRegister dst, XmmRegister src, const Immediate& imm) { 1317 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1318 EmitUint8(0x66); 1319 EmitUint8(0x0F); 1320 EmitUint8(0xC6); 1321 EmitXmmRegisterOperand(dst, src); 1322 EmitUint8(imm.value()); 1323 } 1324 1325 1326 void X86Assembler::shufps(XmmRegister dst, XmmRegister src, const Immediate& imm) { 1327 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1328 EmitUint8(0x0F); 1329 EmitUint8(0xC6); 1330 EmitXmmRegisterOperand(dst, src); 1331 EmitUint8(imm.value()); 1332 } 1333 1334 1335 void X86Assembler::pshufd(XmmRegister dst, XmmRegister src, const Immediate& imm) { 1336 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1337 EmitUint8(0x66); 1338 EmitUint8(0x0F); 1339 EmitUint8(0x70); 1340 EmitXmmRegisterOperand(dst, src); 1341 EmitUint8(imm.value()); 1342 } 1343 1344 1345 void X86Assembler::punpcklbw(XmmRegister dst, XmmRegister src) { 1346 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1347 EmitUint8(0x66); 1348 EmitUint8(0x0F); 1349 EmitUint8(0x60); 1350 EmitXmmRegisterOperand(dst, src); 1351 } 1352 1353 1354 void X86Assembler::punpcklwd(XmmRegister dst, XmmRegister src) { 1355 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1356 EmitUint8(0x66); 1357 EmitUint8(0x0F); 1358 EmitUint8(0x61); 1359 EmitXmmRegisterOperand(dst, src); 1360 } 1361 1362 1363 void X86Assembler::punpckldq(XmmRegister dst, XmmRegister src) { 1364 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1365 EmitUint8(0x66); 1366 EmitUint8(0x0F); 1367 EmitUint8(0x62); 1368 EmitXmmRegisterOperand(dst, src); 1369 } 1370 1371 1372 void X86Assembler::punpcklqdq(XmmRegister dst, XmmRegister src) { 1373 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1374 EmitUint8(0x66); 1375 EmitUint8(0x0F); 1376 EmitUint8(0x6C); 1377 EmitXmmRegisterOperand(dst, src); 1378 } 1379 1380 1381 void X86Assembler::psllw(XmmRegister reg, const Immediate& shift_count) { 1382 DCHECK(shift_count.is_uint8()); 1383 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1384 EmitUint8(0x66); 1385 EmitUint8(0x0F); 1386 EmitUint8(0x71); 1387 EmitXmmRegisterOperand(6, reg); 1388 EmitUint8(shift_count.value()); 1389 } 1390 1391 1392 void X86Assembler::pslld(XmmRegister reg, const Immediate& shift_count) { 1393 DCHECK(shift_count.is_uint8()); 1394 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1395 EmitUint8(0x66); 1396 EmitUint8(0x0F); 1397 EmitUint8(0x72); 1398 EmitXmmRegisterOperand(6, reg); 1399 EmitUint8(shift_count.value()); 1400 } 1401 1402 1403 void X86Assembler::psllq(XmmRegister reg, const Immediate& shift_count) { 1404 DCHECK(shift_count.is_uint8()); 1405 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1406 EmitUint8(0x66); 1407 EmitUint8(0x0F); 1408 EmitUint8(0x73); 1409 EmitXmmRegisterOperand(6, reg); 1410 EmitUint8(shift_count.value()); 1411 } 1412 1413 1414 void X86Assembler::psraw(XmmRegister reg, const Immediate& shift_count) { 1415 DCHECK(shift_count.is_uint8()); 1416 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1417 EmitUint8(0x66); 1418 EmitUint8(0x0F); 1419 EmitUint8(0x71); 1420 EmitXmmRegisterOperand(4, reg); 1421 EmitUint8(shift_count.value()); 1422 } 1423 1424 1425 void X86Assembler::psrad(XmmRegister reg, const Immediate& shift_count) { 1426 DCHECK(shift_count.is_uint8()); 1427 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1428 EmitUint8(0x66); 1429 EmitUint8(0x0F); 1430 EmitUint8(0x72); 1431 EmitXmmRegisterOperand(4, reg); 1432 EmitUint8(shift_count.value()); 1433 } 1434 1435 1436 void X86Assembler::psrlw(XmmRegister reg, const Immediate& shift_count) { 1437 DCHECK(shift_count.is_uint8()); 1438 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1439 EmitUint8(0x66); 1440 EmitUint8(0x0F); 1441 EmitUint8(0x71); 1442 EmitXmmRegisterOperand(2, reg); 1443 EmitUint8(shift_count.value()); 1444 } 1445 1446 1447 void X86Assembler::psrld(XmmRegister reg, const Immediate& shift_count) { 1448 DCHECK(shift_count.is_uint8()); 1449 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1450 EmitUint8(0x66); 1451 EmitUint8(0x0F); 1452 EmitUint8(0x72); 1453 EmitXmmRegisterOperand(2, reg); 1454 EmitUint8(shift_count.value()); 1455 } 1456 1457 1458 void X86Assembler::psrlq(XmmRegister reg, const Immediate& shift_count) { 1459 DCHECK(shift_count.is_uint8()); 1460 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1461 EmitUint8(0x66); 1462 EmitUint8(0x0F); 1463 EmitUint8(0x73); 1464 EmitXmmRegisterOperand(2, reg); 1465 EmitUint8(shift_count.value()); 1466 } 1467 1468 1469 void X86Assembler::psrldq(XmmRegister reg, const Immediate& shift_count) { 1470 DCHECK(shift_count.is_uint8()); 1471 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1472 EmitUint8(0x66); 1473 EmitUint8(0x0F); 1474 EmitUint8(0x73); 1475 EmitXmmRegisterOperand(3, reg); 1476 EmitUint8(shift_count.value()); 1477 } 1478 1479 1480 void X86Assembler::fldl(const Address& src) { 1481 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1482 EmitUint8(0xDD); 1483 EmitOperand(0, src); 1484 } 1485 1486 1487 void X86Assembler::fstl(const Address& dst) { 1488 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1489 EmitUint8(0xDD); 1490 EmitOperand(2, dst); 1491 } 1492 1493 1494 void X86Assembler::fstpl(const Address& dst) { 1495 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1496 EmitUint8(0xDD); 1497 EmitOperand(3, dst); 1498 } 1499 1500 1501 void X86Assembler::fstsw() { 1502 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1503 EmitUint8(0x9B); 1504 EmitUint8(0xDF); 1505 EmitUint8(0xE0); 1506 } 1507 1508 1509 void X86Assembler::fnstcw(const Address& dst) { 1510 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1511 EmitUint8(0xD9); 1512 EmitOperand(7, dst); 1513 } 1514 1515 1516 void X86Assembler::fldcw(const Address& src) { 1517 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1518 EmitUint8(0xD9); 1519 EmitOperand(5, src); 1520 } 1521 1522 1523 void X86Assembler::fistpl(const Address& dst) { 1524 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1525 EmitUint8(0xDF); 1526 EmitOperand(7, dst); 1527 } 1528 1529 1530 void X86Assembler::fistps(const Address& dst) { 1531 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1532 EmitUint8(0xDB); 1533 EmitOperand(3, dst); 1534 } 1535 1536 1537 void X86Assembler::fildl(const Address& src) { 1538 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1539 EmitUint8(0xDF); 1540 EmitOperand(5, src); 1541 } 1542 1543 1544 void X86Assembler::filds(const Address& src) { 1545 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1546 EmitUint8(0xDB); 1547 EmitOperand(0, src); 1548 } 1549 1550 1551 void X86Assembler::fincstp() { 1552 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1553 EmitUint8(0xD9); 1554 EmitUint8(0xF7); 1555 } 1556 1557 1558 void X86Assembler::ffree(const Immediate& index) { 1559 CHECK_LT(index.value(), 7); 1560 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1561 EmitUint8(0xDD); 1562 EmitUint8(0xC0 + index.value()); 1563 } 1564 1565 1566 void X86Assembler::fsin() { 1567 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1568 EmitUint8(0xD9); 1569 EmitUint8(0xFE); 1570 } 1571 1572 1573 void X86Assembler::fcos() { 1574 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1575 EmitUint8(0xD9); 1576 EmitUint8(0xFF); 1577 } 1578 1579 1580 void X86Assembler::fptan() { 1581 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1582 EmitUint8(0xD9); 1583 EmitUint8(0xF2); 1584 } 1585 1586 1587 void X86Assembler::fucompp() { 1588 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1589 EmitUint8(0xDA); 1590 EmitUint8(0xE9); 1591 } 1592 1593 1594 void X86Assembler::fprem() { 1595 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1596 EmitUint8(0xD9); 1597 EmitUint8(0xF8); 1598 } 1599 1600 1601 void X86Assembler::xchgl(Register dst, Register src) { 1602 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1603 EmitUint8(0x87); 1604 EmitRegisterOperand(dst, src); 1605 } 1606 1607 1608 void X86Assembler::xchgl(Register reg, const Address& address) { 1609 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1610 EmitUint8(0x87); 1611 EmitOperand(reg, address); 1612 } 1613 1614 1615 void X86Assembler::cmpb(const Address& address, const Immediate& imm) { 1616 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1617 EmitUint8(0x80); 1618 EmitOperand(7, address); 1619 EmitUint8(imm.value() & 0xFF); 1620 } 1621 1622 1623 void X86Assembler::cmpw(const Address& address, const Immediate& imm) { 1624 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1625 EmitUint8(0x66); 1626 EmitComplex(7, address, imm); 1627 } 1628 1629 1630 void X86Assembler::cmpl(Register reg, const Immediate& imm) { 1631 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1632 EmitComplex(7, Operand(reg), imm); 1633 } 1634 1635 1636 void X86Assembler::cmpl(Register reg0, Register reg1) { 1637 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1638 EmitUint8(0x3B); 1639 EmitOperand(reg0, Operand(reg1)); 1640 } 1641 1642 1643 void X86Assembler::cmpl(Register reg, const Address& address) { 1644 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1645 EmitUint8(0x3B); 1646 EmitOperand(reg, address); 1647 } 1648 1649 1650 void X86Assembler::addl(Register dst, Register src) { 1651 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1652 EmitUint8(0x03); 1653 EmitRegisterOperand(dst, src); 1654 } 1655 1656 1657 void X86Assembler::addl(Register reg, const Address& address) { 1658 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1659 EmitUint8(0x03); 1660 EmitOperand(reg, address); 1661 } 1662 1663 1664 void X86Assembler::cmpl(const Address& address, Register reg) { 1665 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1666 EmitUint8(0x39); 1667 EmitOperand(reg, address); 1668 } 1669 1670 1671 void X86Assembler::cmpl(const Address& address, const Immediate& imm) { 1672 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1673 EmitComplex(7, address, imm); 1674 } 1675 1676 1677 void X86Assembler::testl(Register reg1, Register reg2) { 1678 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1679 EmitUint8(0x85); 1680 EmitRegisterOperand(reg1, reg2); 1681 } 1682 1683 1684 void X86Assembler::testl(Register reg, const Address& address) { 1685 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1686 EmitUint8(0x85); 1687 EmitOperand(reg, address); 1688 } 1689 1690 1691 void X86Assembler::testl(Register reg, const Immediate& immediate) { 1692 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1693 // For registers that have a byte variant (EAX, EBX, ECX, and EDX) 1694 // we only test the byte register to keep the encoding short. 1695 if (immediate.is_uint8() && reg < 4) { 1696 // Use zero-extended 8-bit immediate. 1697 if (reg == EAX) { 1698 EmitUint8(0xA8); 1699 } else { 1700 EmitUint8(0xF6); 1701 EmitUint8(0xC0 + reg); 1702 } 1703 EmitUint8(immediate.value() & 0xFF); 1704 } else if (reg == EAX) { 1705 // Use short form if the destination is EAX. 1706 EmitUint8(0xA9); 1707 EmitImmediate(immediate); 1708 } else { 1709 EmitUint8(0xF7); 1710 EmitOperand(0, Operand(reg)); 1711 EmitImmediate(immediate); 1712 } 1713 } 1714 1715 1716 void X86Assembler::testb(const Address& dst, const Immediate& imm) { 1717 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1718 EmitUint8(0xF6); 1719 EmitOperand(EAX, dst); 1720 CHECK(imm.is_int8()); 1721 EmitUint8(imm.value() & 0xFF); 1722 } 1723 1724 1725 void X86Assembler::testl(const Address& dst, const Immediate& imm) { 1726 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1727 EmitUint8(0xF7); 1728 EmitOperand(0, dst); 1729 EmitImmediate(imm); 1730 } 1731 1732 1733 void X86Assembler::andl(Register dst, Register src) { 1734 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1735 EmitUint8(0x23); 1736 EmitOperand(dst, Operand(src)); 1737 } 1738 1739 1740 void X86Assembler::andl(Register reg, const Address& address) { 1741 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1742 EmitUint8(0x23); 1743 EmitOperand(reg, address); 1744 } 1745 1746 1747 void X86Assembler::andl(Register dst, const Immediate& imm) { 1748 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1749 EmitComplex(4, Operand(dst), imm); 1750 } 1751 1752 1753 void X86Assembler::orl(Register dst, Register src) { 1754 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1755 EmitUint8(0x0B); 1756 EmitOperand(dst, Operand(src)); 1757 } 1758 1759 1760 void X86Assembler::orl(Register reg, const Address& address) { 1761 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1762 EmitUint8(0x0B); 1763 EmitOperand(reg, address); 1764 } 1765 1766 1767 void X86Assembler::orl(Register dst, const Immediate& imm) { 1768 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1769 EmitComplex(1, Operand(dst), imm); 1770 } 1771 1772 1773 void X86Assembler::xorl(Register dst, Register src) { 1774 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1775 EmitUint8(0x33); 1776 EmitOperand(dst, Operand(src)); 1777 } 1778 1779 1780 void X86Assembler::xorl(Register reg, const Address& address) { 1781 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1782 EmitUint8(0x33); 1783 EmitOperand(reg, address); 1784 } 1785 1786 1787 void X86Assembler::xorl(Register dst, const Immediate& imm) { 1788 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1789 EmitComplex(6, Operand(dst), imm); 1790 } 1791 1792 1793 void X86Assembler::addl(Register reg, const Immediate& imm) { 1794 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1795 EmitComplex(0, Operand(reg), imm); 1796 } 1797 1798 1799 void X86Assembler::addl(const Address& address, Register reg) { 1800 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1801 EmitUint8(0x01); 1802 EmitOperand(reg, address); 1803 } 1804 1805 1806 void X86Assembler::addl(const Address& address, const Immediate& imm) { 1807 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1808 EmitComplex(0, address, imm); 1809 } 1810 1811 1812 void X86Assembler::adcl(Register reg, const Immediate& imm) { 1813 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1814 EmitComplex(2, Operand(reg), imm); 1815 } 1816 1817 1818 void X86Assembler::adcl(Register dst, Register src) { 1819 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1820 EmitUint8(0x13); 1821 EmitOperand(dst, Operand(src)); 1822 } 1823 1824 1825 void X86Assembler::adcl(Register dst, const Address& address) { 1826 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1827 EmitUint8(0x13); 1828 EmitOperand(dst, address); 1829 } 1830 1831 1832 void X86Assembler::subl(Register dst, Register src) { 1833 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1834 EmitUint8(0x2B); 1835 EmitOperand(dst, Operand(src)); 1836 } 1837 1838 1839 void X86Assembler::subl(Register reg, const Immediate& imm) { 1840 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1841 EmitComplex(5, Operand(reg), imm); 1842 } 1843 1844 1845 void X86Assembler::subl(Register reg, const Address& address) { 1846 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1847 EmitUint8(0x2B); 1848 EmitOperand(reg, address); 1849 } 1850 1851 1852 void X86Assembler::subl(const Address& address, Register reg) { 1853 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1854 EmitUint8(0x29); 1855 EmitOperand(reg, address); 1856 } 1857 1858 1859 void X86Assembler::cdq() { 1860 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1861 EmitUint8(0x99); 1862 } 1863 1864 1865 void X86Assembler::idivl(Register reg) { 1866 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1867 EmitUint8(0xF7); 1868 EmitUint8(0xF8 | reg); 1869 } 1870 1871 1872 void X86Assembler::imull(Register dst, Register src) { 1873 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1874 EmitUint8(0x0F); 1875 EmitUint8(0xAF); 1876 EmitOperand(dst, Operand(src)); 1877 } 1878 1879 1880 void X86Assembler::imull(Register dst, Register src, const Immediate& imm) { 1881 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1882 // See whether imm can be represented as a sign-extended 8bit value. 1883 int32_t v32 = static_cast<int32_t>(imm.value()); 1884 if (IsInt<8>(v32)) { 1885 // Sign-extension works. 1886 EmitUint8(0x6B); 1887 EmitOperand(dst, Operand(src)); 1888 EmitUint8(static_cast<uint8_t>(v32 & 0xFF)); 1889 } else { 1890 // Not representable, use full immediate. 1891 EmitUint8(0x69); 1892 EmitOperand(dst, Operand(src)); 1893 EmitImmediate(imm); 1894 } 1895 } 1896 1897 1898 void X86Assembler::imull(Register reg, const Immediate& imm) { 1899 imull(reg, reg, imm); 1900 } 1901 1902 1903 void X86Assembler::imull(Register reg, const Address& address) { 1904 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1905 EmitUint8(0x0F); 1906 EmitUint8(0xAF); 1907 EmitOperand(reg, address); 1908 } 1909 1910 1911 void X86Assembler::imull(Register reg) { 1912 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1913 EmitUint8(0xF7); 1914 EmitOperand(5, Operand(reg)); 1915 } 1916 1917 1918 void X86Assembler::imull(const Address& address) { 1919 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1920 EmitUint8(0xF7); 1921 EmitOperand(5, address); 1922 } 1923 1924 1925 void X86Assembler::mull(Register reg) { 1926 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1927 EmitUint8(0xF7); 1928 EmitOperand(4, Operand(reg)); 1929 } 1930 1931 1932 void X86Assembler::mull(const Address& address) { 1933 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1934 EmitUint8(0xF7); 1935 EmitOperand(4, address); 1936 } 1937 1938 1939 void X86Assembler::sbbl(Register dst, Register src) { 1940 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1941 EmitUint8(0x1B); 1942 EmitOperand(dst, Operand(src)); 1943 } 1944 1945 1946 void X86Assembler::sbbl(Register reg, const Immediate& imm) { 1947 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1948 EmitComplex(3, Operand(reg), imm); 1949 } 1950 1951 1952 void X86Assembler::sbbl(Register dst, const Address& address) { 1953 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1954 EmitUint8(0x1B); 1955 EmitOperand(dst, address); 1956 } 1957 1958 1959 void X86Assembler::sbbl(const Address& address, Register src) { 1960 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1961 EmitUint8(0x19); 1962 EmitOperand(src, address); 1963 } 1964 1965 1966 void X86Assembler::incl(Register reg) { 1967 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1968 EmitUint8(0x40 + reg); 1969 } 1970 1971 1972 void X86Assembler::incl(const Address& address) { 1973 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1974 EmitUint8(0xFF); 1975 EmitOperand(0, address); 1976 } 1977 1978 1979 void X86Assembler::decl(Register reg) { 1980 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1981 EmitUint8(0x48 + reg); 1982 } 1983 1984 1985 void X86Assembler::decl(const Address& address) { 1986 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 1987 EmitUint8(0xFF); 1988 EmitOperand(1, address); 1989 } 1990 1991 1992 void X86Assembler::shll(Register reg, const Immediate& imm) { 1993 EmitGenericShift(4, Operand(reg), imm); 1994 } 1995 1996 1997 void X86Assembler::shll(Register operand, Register shifter) { 1998 EmitGenericShift(4, Operand(operand), shifter); 1999 } 2000 2001 2002 void X86Assembler::shll(const Address& address, const Immediate& imm) { 2003 EmitGenericShift(4, address, imm); 2004 } 2005 2006 2007 void X86Assembler::shll(const Address& address, Register shifter) { 2008 EmitGenericShift(4, address, shifter); 2009 } 2010 2011 2012 void X86Assembler::shrl(Register reg, const Immediate& imm) { 2013 EmitGenericShift(5, Operand(reg), imm); 2014 } 2015 2016 2017 void X86Assembler::shrl(Register operand, Register shifter) { 2018 EmitGenericShift(5, Operand(operand), shifter); 2019 } 2020 2021 2022 void X86Assembler::shrl(const Address& address, const Immediate& imm) { 2023 EmitGenericShift(5, address, imm); 2024 } 2025 2026 2027 void X86Assembler::shrl(const Address& address, Register shifter) { 2028 EmitGenericShift(5, address, shifter); 2029 } 2030 2031 2032 void X86Assembler::sarl(Register reg, const Immediate& imm) { 2033 EmitGenericShift(7, Operand(reg), imm); 2034 } 2035 2036 2037 void X86Assembler::sarl(Register operand, Register shifter) { 2038 EmitGenericShift(7, Operand(operand), shifter); 2039 } 2040 2041 2042 void X86Assembler::sarl(const Address& address, const Immediate& imm) { 2043 EmitGenericShift(7, address, imm); 2044 } 2045 2046 2047 void X86Assembler::sarl(const Address& address, Register shifter) { 2048 EmitGenericShift(7, address, shifter); 2049 } 2050 2051 2052 void X86Assembler::shld(Register dst, Register src, Register shifter) { 2053 DCHECK_EQ(ECX, shifter); 2054 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2055 EmitUint8(0x0F); 2056 EmitUint8(0xA5); 2057 EmitRegisterOperand(src, dst); 2058 } 2059 2060 2061 void X86Assembler::shld(Register dst, Register src, const Immediate& imm) { 2062 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2063 EmitUint8(0x0F); 2064 EmitUint8(0xA4); 2065 EmitRegisterOperand(src, dst); 2066 EmitUint8(imm.value() & 0xFF); 2067 } 2068 2069 2070 void X86Assembler::shrd(Register dst, Register src, Register shifter) { 2071 DCHECK_EQ(ECX, shifter); 2072 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2073 EmitUint8(0x0F); 2074 EmitUint8(0xAD); 2075 EmitRegisterOperand(src, dst); 2076 } 2077 2078 2079 void X86Assembler::shrd(Register dst, Register src, const Immediate& imm) { 2080 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2081 EmitUint8(0x0F); 2082 EmitUint8(0xAC); 2083 EmitRegisterOperand(src, dst); 2084 EmitUint8(imm.value() & 0xFF); 2085 } 2086 2087 2088 void X86Assembler::roll(Register reg, const Immediate& imm) { 2089 EmitGenericShift(0, Operand(reg), imm); 2090 } 2091 2092 2093 void X86Assembler::roll(Register operand, Register shifter) { 2094 EmitGenericShift(0, Operand(operand), shifter); 2095 } 2096 2097 2098 void X86Assembler::rorl(Register reg, const Immediate& imm) { 2099 EmitGenericShift(1, Operand(reg), imm); 2100 } 2101 2102 2103 void X86Assembler::rorl(Register operand, Register shifter) { 2104 EmitGenericShift(1, Operand(operand), shifter); 2105 } 2106 2107 2108 void X86Assembler::negl(Register reg) { 2109 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2110 EmitUint8(0xF7); 2111 EmitOperand(3, Operand(reg)); 2112 } 2113 2114 2115 void X86Assembler::notl(Register reg) { 2116 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2117 EmitUint8(0xF7); 2118 EmitUint8(0xD0 | reg); 2119 } 2120 2121 2122 void X86Assembler::enter(const Immediate& imm) { 2123 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2124 EmitUint8(0xC8); 2125 CHECK(imm.is_uint16()); 2126 EmitUint8(imm.value() & 0xFF); 2127 EmitUint8((imm.value() >> 8) & 0xFF); 2128 EmitUint8(0x00); 2129 } 2130 2131 2132 void X86Assembler::leave() { 2133 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2134 EmitUint8(0xC9); 2135 } 2136 2137 2138 void X86Assembler::ret() { 2139 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2140 EmitUint8(0xC3); 2141 } 2142 2143 2144 void X86Assembler::ret(const Immediate& imm) { 2145 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2146 EmitUint8(0xC2); 2147 CHECK(imm.is_uint16()); 2148 EmitUint8(imm.value() & 0xFF); 2149 EmitUint8((imm.value() >> 8) & 0xFF); 2150 } 2151 2152 2153 2154 void X86Assembler::nop() { 2155 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2156 EmitUint8(0x90); 2157 } 2158 2159 2160 void X86Assembler::int3() { 2161 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2162 EmitUint8(0xCC); 2163 } 2164 2165 2166 void X86Assembler::hlt() { 2167 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2168 EmitUint8(0xF4); 2169 } 2170 2171 2172 void X86Assembler::j(Condition condition, Label* label) { 2173 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2174 if (label->IsBound()) { 2175 static const int kShortSize = 2; 2176 static const int kLongSize = 6; 2177 int offset = label->Position() - buffer_.Size(); 2178 CHECK_LE(offset, 0); 2179 if (IsInt<8>(offset - kShortSize)) { 2180 EmitUint8(0x70 + condition); 2181 EmitUint8((offset - kShortSize) & 0xFF); 2182 } else { 2183 EmitUint8(0x0F); 2184 EmitUint8(0x80 + condition); 2185 EmitInt32(offset - kLongSize); 2186 } 2187 } else { 2188 EmitUint8(0x0F); 2189 EmitUint8(0x80 + condition); 2190 EmitLabelLink(label); 2191 } 2192 } 2193 2194 2195 void X86Assembler::j(Condition condition, NearLabel* label) { 2196 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2197 if (label->IsBound()) { 2198 static const int kShortSize = 2; 2199 int offset = label->Position() - buffer_.Size(); 2200 CHECK_LE(offset, 0); 2201 CHECK(IsInt<8>(offset - kShortSize)); 2202 EmitUint8(0x70 + condition); 2203 EmitUint8((offset - kShortSize) & 0xFF); 2204 } else { 2205 EmitUint8(0x70 + condition); 2206 EmitLabelLink(label); 2207 } 2208 } 2209 2210 2211 void X86Assembler::jecxz(NearLabel* label) { 2212 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2213 if (label->IsBound()) { 2214 static const int kShortSize = 2; 2215 int offset = label->Position() - buffer_.Size(); 2216 CHECK_LE(offset, 0); 2217 CHECK(IsInt<8>(offset - kShortSize)); 2218 EmitUint8(0xE3); 2219 EmitUint8((offset - kShortSize) & 0xFF); 2220 } else { 2221 EmitUint8(0xE3); 2222 EmitLabelLink(label); 2223 } 2224 } 2225 2226 2227 void X86Assembler::jmp(Register reg) { 2228 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2229 EmitUint8(0xFF); 2230 EmitRegisterOperand(4, reg); 2231 } 2232 2233 void X86Assembler::jmp(const Address& address) { 2234 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2235 EmitUint8(0xFF); 2236 EmitOperand(4, address); 2237 } 2238 2239 void X86Assembler::jmp(Label* label) { 2240 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2241 if (label->IsBound()) { 2242 static const int kShortSize = 2; 2243 static const int kLongSize = 5; 2244 int offset = label->Position() - buffer_.Size(); 2245 CHECK_LE(offset, 0); 2246 if (IsInt<8>(offset - kShortSize)) { 2247 EmitUint8(0xEB); 2248 EmitUint8((offset - kShortSize) & 0xFF); 2249 } else { 2250 EmitUint8(0xE9); 2251 EmitInt32(offset - kLongSize); 2252 } 2253 } else { 2254 EmitUint8(0xE9); 2255 EmitLabelLink(label); 2256 } 2257 } 2258 2259 2260 void X86Assembler::jmp(NearLabel* label) { 2261 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2262 if (label->IsBound()) { 2263 static const int kShortSize = 2; 2264 int offset = label->Position() - buffer_.Size(); 2265 CHECK_LE(offset, 0); 2266 CHECK(IsInt<8>(offset - kShortSize)); 2267 EmitUint8(0xEB); 2268 EmitUint8((offset - kShortSize) & 0xFF); 2269 } else { 2270 EmitUint8(0xEB); 2271 EmitLabelLink(label); 2272 } 2273 } 2274 2275 2276 void X86Assembler::repne_scasb() { 2277 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2278 EmitUint8(0xF2); 2279 EmitUint8(0xAE); 2280 } 2281 2282 2283 void X86Assembler::repne_scasw() { 2284 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2285 EmitUint8(0x66); 2286 EmitUint8(0xF2); 2287 EmitUint8(0xAF); 2288 } 2289 2290 2291 void X86Assembler::repe_cmpsb() { 2292 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2293 EmitUint8(0xF2); 2294 EmitUint8(0xA6); 2295 } 2296 2297 2298 void X86Assembler::repe_cmpsw() { 2299 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2300 EmitUint8(0x66); 2301 EmitUint8(0xF3); 2302 EmitUint8(0xA7); 2303 } 2304 2305 2306 void X86Assembler::repe_cmpsl() { 2307 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2308 EmitUint8(0xF3); 2309 EmitUint8(0xA7); 2310 } 2311 2312 2313 void X86Assembler::rep_movsb() { 2314 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2315 EmitUint8(0xF3); 2316 EmitUint8(0xA4); 2317 } 2318 2319 2320 void X86Assembler::rep_movsw() { 2321 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2322 EmitUint8(0x66); 2323 EmitUint8(0xF3); 2324 EmitUint8(0xA5); 2325 } 2326 2327 2328 X86Assembler* X86Assembler::lock() { 2329 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2330 EmitUint8(0xF0); 2331 return this; 2332 } 2333 2334 2335 void X86Assembler::cmpxchgl(const Address& address, Register reg) { 2336 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2337 EmitUint8(0x0F); 2338 EmitUint8(0xB1); 2339 EmitOperand(reg, address); 2340 } 2341 2342 2343 void X86Assembler::cmpxchg8b(const Address& address) { 2344 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2345 EmitUint8(0x0F); 2346 EmitUint8(0xC7); 2347 EmitOperand(1, address); 2348 } 2349 2350 2351 void X86Assembler::mfence() { 2352 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2353 EmitUint8(0x0F); 2354 EmitUint8(0xAE); 2355 EmitUint8(0xF0); 2356 } 2357 2358 X86Assembler* X86Assembler::fs() { 2359 // TODO: fs is a prefix and not an instruction 2360 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2361 EmitUint8(0x64); 2362 return this; 2363 } 2364 2365 X86Assembler* X86Assembler::gs() { 2366 // TODO: fs is a prefix and not an instruction 2367 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2368 EmitUint8(0x65); 2369 return this; 2370 } 2371 2372 void X86Assembler::AddImmediate(Register reg, const Immediate& imm) { 2373 int value = imm.value(); 2374 if (value > 0) { 2375 if (value == 1) { 2376 incl(reg); 2377 } else if (value != 0) { 2378 addl(reg, imm); 2379 } 2380 } else if (value < 0) { 2381 value = -value; 2382 if (value == 1) { 2383 decl(reg); 2384 } else if (value != 0) { 2385 subl(reg, Immediate(value)); 2386 } 2387 } 2388 } 2389 2390 2391 void X86Assembler::LoadLongConstant(XmmRegister dst, int64_t value) { 2392 // TODO: Need to have a code constants table. 2393 pushl(Immediate(High32Bits(value))); 2394 pushl(Immediate(Low32Bits(value))); 2395 movsd(dst, Address(ESP, 0)); 2396 addl(ESP, Immediate(2 * sizeof(int32_t))); 2397 } 2398 2399 2400 void X86Assembler::LoadDoubleConstant(XmmRegister dst, double value) { 2401 // TODO: Need to have a code constants table. 2402 int64_t constant = bit_cast<int64_t, double>(value); 2403 LoadLongConstant(dst, constant); 2404 } 2405 2406 2407 void X86Assembler::Align(int alignment, int offset) { 2408 CHECK(IsPowerOfTwo(alignment)); 2409 // Emit nop instruction until the real position is aligned. 2410 while (((offset + buffer_.GetPosition()) & (alignment-1)) != 0) { 2411 nop(); 2412 } 2413 } 2414 2415 2416 void X86Assembler::Bind(Label* label) { 2417 int bound = buffer_.Size(); 2418 CHECK(!label->IsBound()); // Labels can only be bound once. 2419 while (label->IsLinked()) { 2420 int position = label->LinkPosition(); 2421 int next = buffer_.Load<int32_t>(position); 2422 buffer_.Store<int32_t>(position, bound - (position + 4)); 2423 label->position_ = next; 2424 } 2425 label->BindTo(bound); 2426 } 2427 2428 2429 void X86Assembler::Bind(NearLabel* label) { 2430 int bound = buffer_.Size(); 2431 CHECK(!label->IsBound()); // Labels can only be bound once. 2432 while (label->IsLinked()) { 2433 int position = label->LinkPosition(); 2434 uint8_t delta = buffer_.Load<uint8_t>(position); 2435 int offset = bound - (position + 1); 2436 CHECK(IsInt<8>(offset)); 2437 buffer_.Store<int8_t>(position, offset); 2438 label->position_ = delta != 0u ? label->position_ - delta : 0; 2439 } 2440 label->BindTo(bound); 2441 } 2442 2443 2444 void X86Assembler::EmitOperand(int reg_or_opcode, const Operand& operand) { 2445 CHECK_GE(reg_or_opcode, 0); 2446 CHECK_LT(reg_or_opcode, 8); 2447 const int length = operand.length_; 2448 CHECK_GT(length, 0); 2449 // Emit the ModRM byte updated with the given reg value. 2450 CHECK_EQ(operand.encoding_[0] & 0x38, 0); 2451 EmitUint8(operand.encoding_[0] + (reg_or_opcode << 3)); 2452 // Emit the rest of the encoded operand. 2453 for (int i = 1; i < length; i++) { 2454 EmitUint8(operand.encoding_[i]); 2455 } 2456 AssemblerFixup* fixup = operand.GetFixup(); 2457 if (fixup != nullptr) { 2458 EmitFixup(fixup); 2459 } 2460 } 2461 2462 2463 void X86Assembler::EmitImmediate(const Immediate& imm) { 2464 EmitInt32(imm.value()); 2465 } 2466 2467 2468 void X86Assembler::EmitComplex(int reg_or_opcode, 2469 const Operand& operand, 2470 const Immediate& immediate) { 2471 CHECK_GE(reg_or_opcode, 0); 2472 CHECK_LT(reg_or_opcode, 8); 2473 if (immediate.is_int8()) { 2474 // Use sign-extended 8-bit immediate. 2475 EmitUint8(0x83); 2476 EmitOperand(reg_or_opcode, operand); 2477 EmitUint8(immediate.value() & 0xFF); 2478 } else if (operand.IsRegister(EAX)) { 2479 // Use short form if the destination is eax. 2480 EmitUint8(0x05 + (reg_or_opcode << 3)); 2481 EmitImmediate(immediate); 2482 } else { 2483 EmitUint8(0x81); 2484 EmitOperand(reg_or_opcode, operand); 2485 EmitImmediate(immediate); 2486 } 2487 } 2488 2489 2490 void X86Assembler::EmitLabel(Label* label, int instruction_size) { 2491 if (label->IsBound()) { 2492 int offset = label->Position() - buffer_.Size(); 2493 CHECK_LE(offset, 0); 2494 EmitInt32(offset - instruction_size); 2495 } else { 2496 EmitLabelLink(label); 2497 } 2498 } 2499 2500 2501 void X86Assembler::EmitLabelLink(Label* label) { 2502 CHECK(!label->IsBound()); 2503 int position = buffer_.Size(); 2504 EmitInt32(label->position_); 2505 label->LinkTo(position); 2506 } 2507 2508 2509 void X86Assembler::EmitLabelLink(NearLabel* label) { 2510 CHECK(!label->IsBound()); 2511 int position = buffer_.Size(); 2512 if (label->IsLinked()) { 2513 // Save the delta in the byte that we have to play with. 2514 uint32_t delta = position - label->LinkPosition(); 2515 CHECK(IsUint<8>(delta)); 2516 EmitUint8(delta & 0xFF); 2517 } else { 2518 EmitUint8(0); 2519 } 2520 label->LinkTo(position); 2521 } 2522 2523 2524 void X86Assembler::EmitGenericShift(int reg_or_opcode, 2525 const Operand& operand, 2526 const Immediate& imm) { 2527 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2528 CHECK(imm.is_int8()); 2529 if (imm.value() == 1) { 2530 EmitUint8(0xD1); 2531 EmitOperand(reg_or_opcode, operand); 2532 } else { 2533 EmitUint8(0xC1); 2534 EmitOperand(reg_or_opcode, operand); 2535 EmitUint8(imm.value() & 0xFF); 2536 } 2537 } 2538 2539 2540 void X86Assembler::EmitGenericShift(int reg_or_opcode, 2541 const Operand& operand, 2542 Register shifter) { 2543 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2544 CHECK_EQ(shifter, ECX); 2545 EmitUint8(0xD3); 2546 EmitOperand(reg_or_opcode, operand); 2547 } 2548 2549 void X86Assembler::AddConstantArea() { 2550 ArrayRef<const int32_t> area = constant_area_.GetBuffer(); 2551 // Generate the data for the literal area. 2552 for (size_t i = 0, e = area.size(); i < e; i++) { 2553 AssemblerBuffer::EnsureCapacity ensured(&buffer_); 2554 EmitInt32(area[i]); 2555 } 2556 } 2557 2558 size_t ConstantArea::AppendInt32(int32_t v) { 2559 size_t result = buffer_.size() * elem_size_; 2560 buffer_.push_back(v); 2561 return result; 2562 } 2563 2564 size_t ConstantArea::AddInt32(int32_t v) { 2565 for (size_t i = 0, e = buffer_.size(); i < e; i++) { 2566 if (v == buffer_[i]) { 2567 return i * elem_size_; 2568 } 2569 } 2570 2571 // Didn't match anything. 2572 return AppendInt32(v); 2573 } 2574 2575 size_t ConstantArea::AddInt64(int64_t v) { 2576 int32_t v_low = Low32Bits(v); 2577 int32_t v_high = High32Bits(v); 2578 if (buffer_.size() > 1) { 2579 // Ensure we don't pass the end of the buffer. 2580 for (size_t i = 0, e = buffer_.size() - 1; i < e; i++) { 2581 if (v_low == buffer_[i] && v_high == buffer_[i + 1]) { 2582 return i * elem_size_; 2583 } 2584 } 2585 } 2586 2587 // Didn't match anything. 2588 size_t result = buffer_.size() * elem_size_; 2589 buffer_.push_back(v_low); 2590 buffer_.push_back(v_high); 2591 return result; 2592 } 2593 2594 size_t ConstantArea::AddDouble(double v) { 2595 // Treat the value as a 64-bit integer value. 2596 return AddInt64(bit_cast<int64_t, double>(v)); 2597 } 2598 2599 size_t ConstantArea::AddFloat(float v) { 2600 // Treat the value as a 32-bit integer value. 2601 return AddInt32(bit_cast<int32_t, float>(v)); 2602 } 2603 2604 } // namespace x86 2605 } // namespace art 2606