/art/compiler/utils/mips64/ |
assembler_mips64_test.cc | 32 bool operator()(const mips64::GpuRegister& a, const mips64::GpuRegister& b) const { 37 class AssemblerMIPS64Test : public AssemblerTest<mips64::Mips64Assembler, 38 mips64::GpuRegister, 39 mips64::FpuRegister, 41 mips64::VectorRegister> { 43 typedef AssemblerTest<mips64::Mips64Assembler, 44 mips64::GpuRegister, 45 mips64::FpuRegister, 47 mips64::VectorRegister> Base [all...] |
/art/runtime/arch/mips64/ |
quick_method_frame_info_mips64.h | 26 namespace mips64 { namespace in namespace:art 29 (1 << art::mips64::RA); 31 (1 << art::mips64::S2) | (1 << art::mips64::S3) | (1 << art::mips64::S4) | 32 (1 << art::mips64::S5) | (1 << art::mips64::S6) | (1 << art::mips64::S7) | 33 (1 << art::mips64::GP) | (1 << art::mips64::S8) [all...] |
fault_handler_mips64.cc | 34 // Mips64 specific fault handler functions. 44 *out_sp = static_cast<uintptr_t>(sc->sc_regs[mips64::SP]); 56 *out_method = reinterpret_cast<ArtMethod*>(sc->sc_regs[mips64::A0]); 85 sc->sc_regs[mips64::SP] -= mips64::Mips64CalleeSaveFrameSize(Runtime::kSaveEverything); 86 uintptr_t* padding = reinterpret_cast<uintptr_t*>(sc->sc_regs[mips64::SP]) + /* ArtMethod* */ 1; 89 sc->sc_regs[mips64::RA] = sc->sc_pc + 4; // RA needs to point to gc map location 120 uintptr_t sp = sc->sc_regs[mips64::SP]; 143 sc->sc_regs[mips64::T9] = sc->sc_pc; // make sure T9 points to the function
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/development/scripts/ |
example_crashes.py | 115 mips64 = """ 118 ABI: 'mips64'
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/system/core/libpixelflinger/tests/arch-mips64/col32cb16blend/ |
Android.mk | 6 ../../../arch-mips64/col32cb16blend.S 12 LOCAL_MODULE:= test-pixelflinger-mips64-col32cb16blend
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
cp0-names-mips64.d | 1 #objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp0-names=mips64 2 #name: MIPS CP0 register disassembly (mips64)
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cp1-names-mips64.d | 1 #objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric,cp1-names=mips64 2 #name: MIPS CP1 register disassembly (mips64)
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cp0sel-names-mips64.d | 1 #objdump: -dr --prefix-addresses --show-raw-insn -mmips:isa32 -M gpr-names=numeric,cp0-names=mips64 2 #name: MIPS CP0 with sel register disassembly (mips64)
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/art/runtime/interpreter/mterp/ |
rebuild.sh | 23 for arch in arm x86 mips arm64 x86_64 mips64; do TARGET_ARCH_EXT=$arch make -f Makefile_mterp; done
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/external/llvm/test/MC/Mips/ |
macro-li-bad.s | 3 # RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n32 2>&1 | \ 5 # RUN: not llvm-mc %s -arch=mips64 -mcpu=mips64 -target-abi n64 2>&1 | \
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set-mips-directives.s | 28 .set mips64 32 .set mips64 35 .set mips64 64 # CHECK: .set mips64 68 # CHECK: .set mips64 71 # CHECK: .set mips64
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cfi.s | 3 # RUN: llvm-mc %s -triple=mips64-unknown-unknown -show-encoding -mcpu=mips64 | \
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/bionic/tools/versioner/src/ |
Arch.cpp | 34 case Arch::mips64: 35 return "mips64"; 54 } else if (name == "mips64") { 55 return Arch::mips64;
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsMCAsmInfo.cpp | 23 (TheTriple.getArch() == Triple::mips64)) 27 (TheTriple.getArch() == Triple::mips64)) {
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/external/llvm/test/MC/Mips/msa/ |
test_2r_msa64.s | 1 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
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test_elm_insert_msa64.s | 1 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
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test_elm_msa64.s | 1 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
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/external/strace/tests/ |
scno_tampering.sh | 55 o32:mips|n64:mips64) ;;
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/external/strace/tests-m32/ |
scno_tampering.sh | 55 o32:mips|n64:mips64) ;;
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/external/strace/tests-mx32/ |
scno_tampering.sh | 55 o32:mips|n64:mips64) ;;
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/system/core/libpixelflinger/tests/arch-mips64/assembler/ |
Android.mk | 15 LOCAL_MODULE:= test-pixelflinger-mips64-assembler-test
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/system/core/libpixelflinger/tests/arch-mips64/disassembler/ |
Android.mk | 10 LOCAL_MODULE:= test-pixelflinger-mips64-disassembler-test
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/build/make/target/product/ |
sdk_phone_mips64.mk | 35 PRODUCT_MODEL := Android SDK built for mips64
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/external/libvpx/ |
config.mips64.mk | 7 libvpx_target := config/mips64-msa 9 libvpx_target := config/mips64
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/external/llvm/lib/Target/Mips/TargetInfo/ |
MipsTargetInfo.cpp | 25 RegisterTarget<Triple::mips64, 26 /*HasJIT=*/true> A(TheMips64Target, "mips64", "Mips64 [experimental]");
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