HomeSort by relevance Sort by last modified time
    Searched refs:pld (Results 1 - 25 of 154) sorted by null

1 2 3 4 5 6 7

  /external/syslinux/com32/modules/
kontron_wdt.c 2 * kempld_wdt.c - Kontron PLD watchdog driver
8 * Note: From the PLD watchdog point of view timeout and pretimeout are
41 struct kempld_device_data pld; variable in typeref:struct:kempld_device_data
67 * kempld_set_index - change the current register index of the PLD
68 * @pld: kempld_device_data structure describing the PLD
71 * This function changes the register index of the PLD.
73 void kempld_set_index(struct kempld_device_data *pld, uint8_t index)
75 if (pld->last_index != index) {
76 iowrite8(index, pld->io_index)
156 struct kempld_device_data *pld = wdt->pld; local
205 struct kempld_device_data *pld = wdt->pld; local
216 struct kempld_device_data *pld = wdt->pld; local
240 struct kempld_device_data *pld = wdt->pld; local
328 struct kempld_device_data *pld = wdt->pld; local
    [all...]
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/
macro-pld.s 4 foo r0, pld [r0]
macro-pld.d 8 \s*0:\s+f5d0f000\s+pld\s+\[r0\]
xscale.s 21 pld [r0]
22 pld [r1, #0x789]
23 pld [r2, r3]
24 pld [r4, -r5, lsl #5]
xscale.d 22 0+30 <[^>]*> f5d0f000 pld \[r0\]
23 0+34 <[^>]*> f5d1f789 pld \[r1, #1929\].*
24 0+38 <[^>]*> f7d2f003 pld \[r2, r3\]
25 0+3c <[^>]*> f754f285 pld \[r4, -r5, lsl #5\]
ldst-pc.s 14 pld [pc, #-8]
15 pld [pc, r1]
  /bionic/libc/arch-arm/cortex-a9/bionic/
memcpy.S 55 pld [r1, #0]
60 pld [r1, #64]
memcpy_base.S 80 pld [r1, #0]
81 pld [r1, #(32 * 2)]
88 pld [r1, #(32 * 4)]
89 pld [r1, #(32 * 6)]
94 pld [r1, #(32 * 6)]
152 pld [r1, #(32 * 4)]
179 pld [r1, #(32 * 8)]
  /external/libvpx/libvpx/vpx_dsp/arm/
vpx_convolve_avg_neon_asm.asm 35 pld [r0, r1, lsl #1]
38 pld [r2, r3]
56 pld [r0]
58 pld [r0, r1]
60 pld [r6]
62 pld [r6, r3]
75 pld [r0]
76 pld [r0, r1]
78 pld [r6]
79 pld [r6, r3
    [all...]
vpx_convolve_copy_neon_asm.asm 34 pld [r0, r1, lsl #1]
44 pld [r0, r1, lsl #1]
46 pld [r0, r1, lsl #1]
55 pld [r0, r1, lsl #1]
57 pld [r0, r1, lsl #1]
66 pld [r0, r1, lsl #1]
68 pld [r0, r1, lsl #1]
vpx_convolve8_avg_neon_asm.asm 85 pld [r0, r1, lsl #2]
106 pld [r5]
113 pld [r5, r1]
120 pld [r5, r1, lsl #1]
136 pld [r5, -r8]
232 pld [r7]
233 pld [r4]
238 pld [r7, r1]
239 pld [r4, r1]
243 pld [r5
    [all...]
vpx_convolve8_neon_asm.asm 85 pld [r0, r1, lsl #2]
106 pld [r5]
113 pld [r5, r1]
120 pld [r5, r1, lsl #1]
128 pld [r5, -r8]
216 pld [r5]
217 pld [r8]
222 pld [r5, r3]
223 pld [r8, r3]
227 pld [r7
    [all...]
  /bionic/libc/arch-arm/cortex-a15/bionic/
memcpy.S 75 pld [r1, #64]
__strcpy_chk.S 39 pld [r0, #0]
83 pld [r0, #64]
147 pld [r1, #0]
148 pld [r1, #64]
  /bionic/libc/arch-arm/cortex-a53/bionic/
memcpy.S 75 pld [r1, #64]
__strcpy_chk.S 39 pld [r0, #0]
83 pld [r0, #64]
147 pld [r1, #0]
148 pld [r1, #64]
  /bionic/libc/arch-arm/cortex-a7/bionic/
memcpy.S 75 pld [r1, #64]
__strcpy_chk.S 39 pld [r0, #0]
83 pld [r0, #64]
147 pld [r1, #0]
148 pld [r1, #64]
  /bionic/libc/arch-arm/denver/bionic/
memcpy.S 77 pld [r1, #64]
memmove.S 65 pld [r1, #-CACHE_LINE_SIZE]
66 pld [r1, #-CACHE_LINE_SIZE*2]
117 pld [r1, #-CACHE_LINE_SIZE*3]
118 pld [r1, #-CACHE_LINE_SIZE*4]
139 pld [r1, #-(PREFETCH_DISTANCE_NEAR+CACHE_LINE_SIZE*2)+32]
147 pld [r1, #-(PREFETCH_DISTANCE_NEAR+CACHE_LINE_SIZE*2)+32]
173 pld [r1, #-(PREFETCH_DISTANCE_MID+CACHE_LINE_SIZE)+32]
181 pld [r1, #-(PREFETCH_DISTANCE_MID+CACHE_LINE_SIZE)+32]
206 pld [r1, #-(PREFETCH_DISTANCE_FAR+CACHE_LINE_SIZE*2)+128]
207 pld [r1, #-(PREFETCH_DISTANCE_FAR+CACHE_LINE_SIZE)+128
    [all...]
memcpy_base.S 44 pld [r1, #CACHE_LINE_SIZE*1]
54 pld [r1, #CACHE_LINE_SIZE*2]
57 pld [r1, #CACHE_LINE_SIZE*3]
110 pld [r1, #PREFETCH_DISTANCE]
117 pld [r1, #PREFETCH_DISTANCE]
136 pld [r1, #PREFETCH_DISTANCE]
143 pld [r1, #PREFETCH_DISTANCE]
  /bionic/libc/arch-arm/krait/bionic/
memcpy.S 58 pld [r1, #64]
  /bionic/libc/arch-arm/generic/bionic/
memcmp.S 45 pld [r0, #(CACHE_LINE_SIZE * 0)]
46 pld [r0, #(CACHE_LINE_SIZE * 1)]
53 pld [r1, #(CACHE_LINE_SIZE * 0)]
54 pld [r1, #(CACHE_LINE_SIZE * 1)]
70 pld [r0, #(CACHE_LINE_SIZE * 2)]
71 pld [r1, #(CACHE_LINE_SIZE * 2)]
75 pld [r0, #(CACHE_LINE_SIZE * 2)]
77 pld [r1, #(CACHE_LINE_SIZE * 2)]
158 0: pld [r4, #(CACHE_LINE_SIZE * 2)]
159 pld [r1, #(CACHE_LINE_SIZE * 2)
    [all...]
  /device/google/contexthub/firmware/lib/libc/
arm_asm.h 76 pld [\base, \offset]
92 "pld [\\base, \\offset]\n\t"
  /art/runtime/arch/arm/
memcmp16_arm.S 25 * and use of pld will be needed.
32 pld [r0, #0]
33 pld [r1, #0]
55 pld [r0, #32]
56 pld [r1, #32]
106 pld [r3, #64]
107 pld [r1, #64]
197 pld [r3, #64]
198 pld [r1, #64]

Completed in 567 milliseconds

1 2 3 4 5 6 7