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    Searched refs:ref_reg (Results 1 - 8 of 8) sorted by null

  /art/compiler/optimizing/
code_generator_mips64.cc 484 GpuRegister ref_reg = ref_.AsRegister<GpuRegister>(); variable
486 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(ref_reg)) << ref_reg;
505 DCHECK((V0 <= ref_reg && ref_reg <= T2) ||
506 (S2 <= ref_reg && ref_reg <= S7) ||
507 (ref_reg == S8)) << ref_reg;
529 CodeGenerator::GetReadBarrierMarkEntryPointsOffset<kMips64PointerSize>(ref_reg - 1)
579 GpuRegister ref_reg = ref_.AsRegister<GpuRegister>(); variable
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code_generator_arm.cc 661 Register ref_reg = ref_.AsRegister<Register>(); local
667 DCHECK_NE(ref_reg, SP);
668 DCHECK_NE(ref_reg, LR);
669 DCHECK_NE(ref_reg, PC);
672 DCHECK_NE(ref_reg, IP);
673 DCHECK(0 <= ref_reg && ref_reg < kNumberOfCoreRegisters) << ref_reg;
694 CodeGenerator::GetReadBarrierMarkEntryPointsOffset<kArmPointerSize>(ref_reg);
739 Register ref_reg = ref_.AsRegister<Register>() variable
800 Register ref_reg = ref_.AsRegister<Register>(); variable
943 Register ref_reg = ref_.AsRegister<Register>(); variable
8128 Register ref_reg = ref.AsRegister<Register>(); local
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code_generator_mips.cc 538 Register ref_reg = ref_.AsRegister<Register>(); variable
540 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(ref_reg)) << ref_reg;
559 DCHECK((V0 <= ref_reg && ref_reg <= T7) ||
560 (S2 <= ref_reg && ref_reg <= S7) ||
561 (ref_reg == FP)) << ref_reg;
583 CodeGenerator::GetReadBarrierMarkEntryPointsOffset<kMipsPointerSize>(ref_reg - 1)
634 Register ref_reg = ref_.AsRegister<Register>(); variable
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code_generator_x86.cc 470 Register ref_reg = ref_.AsRegister<Register>(); variable
472 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(ref_reg)) << ref_reg;
489 __ MaybeUnpoisonHeapReference(ref_reg);
495 DCHECK_NE(ref_reg, ESP);
496 DCHECK(0 <= ref_reg && ref_reg < kNumberOfCpuRegisters) << ref_reg;
512 CodeGenerator::GetReadBarrierMarkEntryPointsOffset<kX86PointerSize>(ref_reg);
558 Register ref_reg = ref_.AsRegister<Register>() variable
7284 Register ref_reg = ref.AsRegister<Register>(); local
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code_generator_arm_vixl.cc 685 vixl32::Register ref_reg = RegisterFrom(ref_); local
691 DCHECK(!ref_reg.Is(sp));
692 DCHECK(!ref_reg.Is(lr));
693 DCHECK(!ref_reg.Is(pc));
696 DCHECK(!ref_reg.Is(ip));
697 DCHECK(ref_reg.IsRegister()) << ref_reg;
718 CodeGenerator::GetReadBarrierMarkEntryPointsOffset<kArmPointerSize>(ref_reg.GetCode());
822 vixl32::Register ref_reg = RegisterFrom(ref_); variable
972 vixl32::Register ref_reg = RegisterFrom(ref_); variable
8205 vixl32::Register ref_reg = RegisterFrom(ref, type); local
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code_generator_arm64.cc 979 Register ref_reg = WRegisterFrom(ref_); variable
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code_generator_x86_64.cc 484 Register ref_reg = ref_cpu_reg.AsRegister(); variable
486 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(ref_reg)) << ref_reg;
509 DCHECK_NE(ref_reg, RSP);
510 DCHECK(0 <= ref_reg && ref_reg < kNumberOfCpuRegisters) << ref_reg;
526 CodeGenerator::GetReadBarrierMarkEntryPointsOffset<kX86_64PointerSize>(ref_reg);
577 Register ref_reg = ref_cpu_reg.AsRegister(); variable
579 DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(ref_reg)) << ref_reg
6650 CpuRegister ref_reg = ref.AsRegister<CpuRegister>(); local
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  /art/compiler/utils/arm64/
jni_macro_assembler_arm64.cc 308 WRegister ref_reg = dst.AsOverlappingWRegister(); local
309 asm_.MaybeUnpoisonHeapReference(reg_w(ref_reg));

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