| /device/linaro/bootloader/arm-trusted-firmware/plat/juno/ |
| bl31_plat_setup.c | 157 unsigned int reg_val; local
169 reg_val = (1 << CNTACR_RPCT_SHIFT) | (1 << CNTACR_RVCT_SHIFT);
170 reg_val |= (1 << CNTACR_RFRQ_SHIFT) | (1 << CNTACR_RVOFF_SHIFT);
171 reg_val |= (1 << CNTACR_RWVT_SHIFT) | (1 << CNTACR_RWPT_SHIFT);
172 mmio_write_32(SYS_TIMCTL_BASE + CNTACR_BASE(1), reg_val);
174 reg_val = (1 << CNTNSAR_NS_SHIFT(1));
175 mmio_write_32(SYS_TIMCTL_BASE + CNTNSAR, reg_val);
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/fvp/ |
| bl31_fvp_setup.c | 232 unsigned int reg_val; local
251 reg_val = (1 << CNTACR_RPCT_SHIFT) | (1 << CNTACR_RVCT_SHIFT);
252 reg_val |= (1 << CNTACR_RFRQ_SHIFT) | (1 << CNTACR_RVOFF_SHIFT);
253 reg_val |= (1 << CNTACR_RWVT_SHIFT) | (1 << CNTACR_RWPT_SHIFT);
254 mmio_write_32(SYS_TIMCTL_BASE + CNTACR_BASE(0), reg_val);
255 mmio_write_32(SYS_TIMCTL_BASE + CNTACR_BASE(1), reg_val);
257 reg_val = (1 << CNTNSAR_NS_SHIFT(0)) | (1 << CNTNSAR_NS_SHIFT(1));
258 mmio_write_32(SYS_TIMCTL_BASE + CNTNSAR, reg_val);
|
| /external/valgrind/none/tests/mips64/ |
| cvm_ins.c | 2 const int reg_val[256] = { variable
131 TESTINST1("exts $t1, $t2, 1, 7", reg_val[i], t1, t2, 1, 7);
138 TESTINST1("exts32 $t1, $t2, 1 , 7", reg_val[i], t1, t2, 1, 7);
145 TESTINST1("cins $t1, $t2, 2 , 9", reg_val[i], t1, t2, 2, 9);
152 TESTINST1("cins32 $t1, $t2, 2 , 9", reg_val[i], t1, t2, 2, 9);
159 TESTINST2("seq $t1, $t2 ,$t3 ", reg_val[i], reg_val[j],
171 TESTINST3("seqi $t1, $t2 ,9 ", reg_val[i], t1, t2, 9);
178 TESTINST2("sne $t1, $t2 ,$t3 ", reg_val[i], reg_val[j]
[all...] |
| load_indexed_instructions.c | 2 const int reg_val[256] = { variable
98 TEST1("ldx", i, reg_val);
100 TEST1("lbux", i, reg_val);
102 TEST1("lwx", i, reg_val);
104 TEST1("lhx", i, reg_val);
|
| cvm_lx_ins.c | 2 const int reg_val[256] = { variable
98 TEST1("lhux", i, reg_val);
103 TEST1("lwux", i, reg_val);
108 TEST1("lbx", i, reg_val);
|
| /external/syslinux/gpxe/src/drivers/net/ |
| amd8111e.c | 138 unsigned int reg_val; local
170 reg_val = readl(mmio + INT0);
171 writel(reg_val, mmio + INT0);
205 reg_val = readl(mmio + SRAM_SIZE);
221 int i, reg_val; local
234 reg_val = readl(mmio + CTRL1);
235 reg_val &= ~XMTSP_MASK;
236 writel(reg_val | XMTSP_128 | CACHE_ALIGN, mmio + CTRL1);
274 unsigned int reg_val; local
277 reg_val = readl(mmio + PHY_ACCESS)
453 u32 reg_val; local
468 u32 reg_val; local
[all...] |
| /device/linaro/bootloader/arm-trusted-firmware/drivers/arm/gic/ |
| gic_v2.c | 195 unsigned int reg_val = gicd_read_igroupr(base, id); local
197 return (reg_val >> bit_num) & 0x1;
203 unsigned int reg_val = gicd_read_igroupr(base, id); local
205 gicd_write_igroupr(base, id, reg_val | (1 << bit_num));
211 unsigned int reg_val = gicd_read_igroupr(base, id); local
213 gicd_write_igroupr(base, id, reg_val & ~(1 << bit_num));
266 unsigned int reg_val = mmio_read_32(reg); local
281 reg_val &= ~(GIC_PRI_MASK << shift);
282 reg_val |= (pri & GIC_PRI_MASK) << shift;
283 mmio_write_32(reg, reg_val);
289 unsigned int reg_val = gicd_read_itargetsr(base, id); local
[all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-cr16.c | 325 return rreg->value.reg_val;
349 return rreg->value.reg_val;
364 && ((rreg->value.reg_val == 12) || (rreg->value.reg_val == 13)))
365 return rreg->value.reg_val;
380 if ((rreg->value.reg_val != 1) || (rreg->value.reg_val != 7)
381 || (rreg->value.reg_val != 9) || (rreg->value.reg_val > 10))
382 return rreg->value.reg_val;
2105 unsigned int count = insn->arg[0].constant, reg_val; local
[all...] |
| tc-crx.c | 214 return rreg->value.reg_val;
[all...] |
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| cr16.h | 353 reg reg_val; member in union:__anon108781::__anon108782
|
| crx.h | 350 reg reg_val; member in union:__anon108794::__anon108795
|
| /external/syslinux/gpxe/src/drivers/net/e1000/ |
| e1000_hw.c | 3787 uint32_t reg_val; local
3820 uint32_t reg_val; local
[all...] |
