| /external/valgrind/none/tests/mips64/ |
| logical_instructions.c | 23 TEST1("and $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1],
34 TEST2("andi $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1);
35 TEST2("andi $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3);
36 TEST2("andi $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1);
37 TEST2("andi $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1);
56 TEST1("nor $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1],
64 TEST1("or $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1]
[all...] |
| shift_instructions.c | 28 TEST2("drotr $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1);
29 TEST2("drotr $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3);
30 TEST2("drotr $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1);
31 TEST2("drotr $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1);
41 TEST2("drotr32 $t0, $t1, 0x00", reg_val2[i], 0x00, t0, t1);
42 TEST2("drotr32 $t2, $t3, 0x1f", reg_val2[i], 0x1f, t2, t3);
43 TEST2("drotr32 $a0, $a1, 0x0f", reg_val2[i], 0x0f, a0, a1);
44 TEST2("drotr32 $s0, $s1, 0x03", reg_val2[i], 0x03, s0, s1);
52 TEST1("drotrv $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1]
[all...] |
| arithmetic_instruction.c | 93 TEST2("daddi $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1);
94 TEST2("daddi $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3);
95 TEST2("daddi $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1);
96 TEST2("daddi $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1);
106 TEST2("daddiu $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1);
107 TEST2("daddiu $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3);
108 TEST2("daddiu $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1);
109 TEST2("daddiu $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1);
117 TEST1("daddu $s0, $s1, $s2", reg_val2[i], reg_val2[N-i-1]
[all...] |
| load_store.c | 18 TEST1("lb", i, reg_val2);
25 TEST1("lbu", i, reg_val2);
32 TEST1("ld", i, reg_val2);
39 TEST1("ldl", i, reg_val2);
46 TEST1("ldr", i, reg_val2);
53 TEST1("lh", i, reg_val2);
60 TEST1("lhu", i, reg_val2);
67 TEST1("lw", i, reg_val2);
74 TEST1("lwl", i, reg_val2);
81 TEST1("lwr", i, reg_val2);
[all...] |
| fpu_load_store.c | 19 TEST3("ldc1", i, reg_val2);
26 TEST5("ldxc1", i, reg_val2);
33 TEST3w("lwc1", i, reg_val2);
40 TEST5w("lwxc1", i, reg_val2);
|
| macro_load_store.h | 40 : "r" (reg_val2) , "r" (reg_val_zero), "r" (offset) \
154 : "r" (reg_val2) , "r" (reg_val_zero), "r" (offset) \
|
| const.h | 70 unsigned long long reg_val2[N]; variable
76 reg_val2[0]= c & 0xffffffffUL;
78 reg_val2[i] = (1812433253UL * (reg_val2[i - 1] ^
79 (reg_val2[i - 1] >> 30)) + i);
|
| move_instructions.c | 205 TEST1(reg_val2[i]);
206 TEST2(reg_val2[i]);
|
