| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| arch7em.s | 122 smmulr r0, r0, r0
|
| archv6.s | 108 smmulr r1,r2,r3
|
| arch7em.d | 112 0[0-9a-f]+ <[^>]+> fb50 f010 smmulr r0, r0, r0
|
| archv6.d | 111 0+19c <[^>]*> e751f332 ? smmulr r1, r2, r3
|
| thumb32.s | 692 smmulr r0, r0, r0
|
| thumb32.d | [all...] |
| /external/valgrind/none/tests/arm/ |
| v6intARM.stdout.exp | [all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-rn-rm-a32.cc | 68 M(smmulr) \
472 #include "aarch32/traces/assembler-cond-rd-rn-rm-a32-smmulr.h"
[all...] |
| test-assembler-cond-rd-rn-rm-t32.cc | 67 M(smmulr) \
470 #include "aarch32/traces/assembler-cond-rd-rn-rm-t32-smmulr.h"
[all...] |
| /external/vixl/src/aarch32/ |
| assembler-aarch32.h | 3120 void smmulr(Register rd, Register rn, Register rm) { smmulr(al, rd, rn, rm); } function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.h | 1033 void smmulr(Condition cond, Register rd, Register rn, Register rm);
[all...] |
| assembler-aarch32.cc | 9544 void Assembler::smmulr(Condition cond, Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.cc | 2731 void Disassembler::smmulr(Condition cond, function in class:vixl::aarch32::Disassembler
[all...] |
| macro-assembler-aarch32.h | [all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /external/llvm/test/MC/ARM/ |
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
