| /external/llvm/test/MC/ARM/ |
| thumb2-dsp-diag.s | 6 sxtab16 r0, r0, r0 label
16 @ CHECK-7EM: sxtab16 r0, r0, r0 @ encoding: [0x20,0xfa,0x80,0xf0]
|
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| archv6.s | 56 sxtab16 r2, r4, r5
57 sxtab16 r2, r4, r5, ROR #8
|
| thumb2_bad_reg.s | 701 @ SXTAB16
702 sxtab16 r13, r0, r1
703 sxtab16 r15, r0, r1
704 sxtab16 r0, r13, r1
705 sxtab16 r0, r15, r1
706 sxtab16 r0, r1, r13
707 sxtab16 r0, r1, r15
|
| arch7em.s | 153 sxtab16 r1, r2, r3
|
| archv6.d | 59 0+0cc <[^>]*> e6842075 ? sxtab16 r2, r4, r5
60 0+0d0 <[^>]*> e6842475 ? sxtab16 r2, r4, r5, ror #8
|
| arch7em-bad.l | 128 [^:]*:153: Error: selected processor does not support Thumb mode `sxtab16 r1,r2,r3'
|
| arch7em.d | 135 0[0-9a-f]+ <[^>]+> fa22 f183 sxtab16 r1, r2, r3
|
| thumb2_bad_reg.l | [all...] |
| thumb32.s | 756 sxtab16 r1, r2, r3
|
| thumb32.d | [all...] |
| /external/valgrind/none/tests/arm/ |
| v6media.stdout.exp | [all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-rn-operand-rm-a32.cc | 73 M(sxtab16) \
[all...] |
| test-assembler-cond-rd-rn-operand-rm-t32.cc | 73 M(sxtab16) \
[all...] |
| test-assembler-cond-rd-rn-operand-rm-ror-amount-a32.cc | 53 M(sxtab16) \
[all...] |
| test-assembler-cond-rd-rn-operand-rm-ror-amount-t32.cc | 53 M(sxtab16) \
[all...] |
| /external/vixl/src/aarch32/ |
| assembler-aarch32.h | 3475 void sxtab16(Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.h | [all...] |
| assembler-aarch32.cc | 11491 void Assembler::sxtab16(Condition cond, function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.cc | 3226 void Disassembler::sxtab16(Condition cond, function in class:vixl::aarch32::Disassembler
[all...] |
| macro-assembler-aarch32.h | [all...] |
