| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| thumbv6.s | 14 sxth r0, r1
|
| thumbv6.d | 16 0+010 <[^>]*> b208 * sxth r0, r1
|
| r15-bad.s | 52 sxth r15, r2
53 sxth r1, r15
|
| r15-bad.l | 49 [^:]*:52: Error: r15 not allowed here -- `sxth r15,r2'
50 [^:]*:53: Error: r15 not allowed here -- `sxth r1,r15'
|
| archv6.s | 133 sxth r2, r5
134 sxth r2, r5, ROR #8
|
| t16-bad.l | 28 [^:]*:44: Error: lo register required -- `sxth r8,r0'
29 [^:]*:44: Error: lo register required -- `sxth r0,r8'
30 [^:]*:44: Error: Thumb encoding does not support rotation -- `sxth r0,r1,ror#8'
|
| archv6.d | 136 0+200 <[^>]*> e6bf2075 ? sxth r2, r5
137 0+204 <[^>]*> e6bf2475 ? sxth r2, r5, ror #8
|
| thumb2_bad_reg.s | 725 @ SXTH
726 sxth r13, r0
727 sxth r15, r0
728 sxth r0, r13
729 sxth r0, r15
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| bitfield-alias.s | 68 bf_32r sxth
69 bf_64x sxth
|
| programmer-friendly.s | 54 adds x0, sp, x0, sxth #1
|
| addsub.d | 39 7c: 0b21a0f0 add w16, w7, w1, sxth
40 80: 0b21a0f0 add w16, w7, w1, sxth
41 84: 0b21a4f0 add w16, w7, w1, sxth #1
42 88: 0b21a8f0 add w16, w7, w1, sxth #2
43 8c: 0b21acf0 add w16, w7, w1, sxth #3
44 90: 0b21b0f0 add w16, w7, w1, sxth #4
93 154: 0b21a3f0 add w16, wsp, w1, sxth
94 158: 0b21a3f0 add w16, wsp, w1, sxth
95 15c: 0b21a7f0 add w16, wsp, w1, sxth #1
96 160: 0b21abf0 add w16, wsp, w1, sxth #
[all...] |
| shifted.s | 121 op3_64x \op, sxth
130 op3_32x \op, sxth
142 op2_64x \op, sxth
152 op2_32x \op, sxth
|
| shifted.d | 366 598: 8b23a041 add x1, x2, w3, sxth
367 59c: 8b23a441 add x1, x2, w3, sxth #1
368 5a0: 8b23a841 add x1, x2, w3, sxth #2
369 5a4: 8b23ac41 add x1, x2, w3, sxth #3
370 5a8: 8b23b041 add x1, x2, w3, sxth #4
414 658: 0b23a041 add w1, w2, w3, sxth
415 65c: 0b23a441 add w1, w2, w3, sxth #1
416 660: 0b23a841 add w1, w2, w3, sxth #2
417 664: 0b23ac41 add w1, w2, w3, sxth #3
418 668: 0b23b041 add w1, w2, w3, sxth #
[all...] |
| programmer-friendly.d | 20 2c: ab20a7e0 adds x0, sp, w0, sxth #1
|
| /external/llvm/test/MC/ARM/ |
| thumb.s | 26 sxth r2, r3
28 @ CHECK: sxth r2, r3 @ encoding: [0x1a,0xb2]
|
| basic-thumb-instructions.s | 638 @ SXTB/SXTH
641 sxth r3, r5
644 @ CHECK: sxth r3, r5 @ encoding: [0x2b,0xb2]
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| thumb.s | 26 sxth r2, r3
28 @ CHECK: sxth r2, r3 @ encoding: [0x1a,0xb2]
|
| basic-thumb-instructions.s | 587 @ SXTB/SXTH
590 sxth r3, r5
593 @ CHECK: sxth r3, r5 @ encoding: [0x2b,0xb2]
|
| basic-thumb2-instructions.s | [all...] |
| /external/llvm/test/MC/AArch64/ |
| arm64-arithmetic-encoding.s | 175 add w1, w2, w3, sxth
184 ; CHECK: add w1, w2, w3, sxth ; encoding: [0x41,0xa0,0x23,0x0b]
192 add x1, x2, w3, sxth
199 ; CHECK: add x1, x2, w3, sxth ; encoding: [0x41,0xa0,0x23,0x8b]
219 sub w1, w2, w3, sxth
228 ; CHECK: sub w1, w2, w3, sxth ; encoding: [0x41,0xa0,0x23,0x4b]
236 sub x1, x2, w3, sxth
243 ; CHECK: sub x1, x2, w3, sxth ; encoding: [0x41,0xa0,0x23,0xcb]
263 adds w1, w2, w3, sxth
272 ; CHECK: adds w1, w2, w3, sxth ; encoding: [0x41,0xa0,0x23,0x2b
[all...] |
| basic-a64-instructions.s | 23 add x18, x13, w19, sxth
31 // CHECK: add x18, x13, w19, sxth // encoding: [0xb2,0xa1,0x33,0x8b]
41 add w26, w17, w19, sxth
49 // CHECK: add w26, w17, w19, sxth // encoding: [0x3a,0xa2,0x33,0x0b]
69 sub x18, x13, w19, sxth
77 // CHECK: sub x18, x13, w19, sxth // encoding: [0xb2,0xa1,0x33,0xcb]
86 sub w26, wsp, w19, sxth
94 // CHECK: sub w26, wsp, w19, sxth // encoding: [0xfa,0xa3,0x33,0x4b]
104 adds x18, sp, w19, sxth
112 // CHECK: adds x18, sp, w19, sxth // encoding: [0xf2,0xa3,0x33,0xab
[all...] |
| /external/libhevc/decoder/arm64/ |
| ihevcd_itrans_recon_dc_chroma.s | 65 sxth x5, w5 // since the argument is of word16, sign extend to x register
|
| ihevcd_itrans_recon_dc_luma.s | 64 sxth x5,w5
|
| /external/valgrind/none/tests/arm64/ |
| integer.stdout.exp | [all...] |
| /external/v8/src/arm/ |
| disasm-arm.cc | [all...] |
