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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
ulw.s 1 # Source file used to test the ulw macro.
13 ulw $4,0
14 ulw $4,1
15 ulw $4,0x8000
16 ulw $4,-0x8000
17 ulw $4,0x10000
18 ulw $4,0x1a5a5
19 ulw $4,0($5)
20 ulw $4,1($5)
21 ulw $4,data_labe
    [all...]
ulw-reloc.s 3 ulw $4,($4)
4 ulw $4,0x7fc($4)
5 ulw $4,0x7fd($4)
6 ulw $4,0x7ff($4)
7 ulw $4,0x800($4)
8 ulw $4,0x7ffc($4)
9 ulw $4,0x7ffd($4)
10 ulw $4,0x7fff($4)
11 ulw $4,0x8000($4)
13 ulw $4,($5
    [all...]
ulw2.s 1 # Source file used to test the ulw macro (harder).
6 ulw $4,0($5)
7 ulw $4,1($5)
9 ulw $5,0($5) # warns
10 ulw $5,1($5) # warns
elf-rel-got-n32.s 34 ulw $5,dg1+0
35 ulw $5,dg1+12
36 ulw $5,dg1+0($17)
37 ulw $5,dg1+12($17)
38 ulw $5,dg1+34($5)
55 ulw $5,dl1+0
56 ulw $5,dl1+12
57 ulw $5,dl1+0($17)
58 ulw $5,dl1+12($17)
59 ulw $5,dl1+34($5
    [all...]
elf-rel-got-n64.s 34 ulw $5,dg1+0
35 ulw $5,dg1+12
36 ulw $5,dg1+0($17)
37 ulw $5,dg1+12($17)
38 ulw $5,dg1+34($5)
55 ulw $5,dl1+0
56 ulw $5,dl1+12
57 ulw $5,dl1+0($17)
58 ulw $5,dl1+12($17)
59 ulw $5,dl1+34($5
    [all...]
vxworks1.s 7 ulw $4,local
8 ulw $4,global
vxworks1-el.d 45 # ulw $4,local
52 # ulw $4,global
vxworks1.d 44 # ulw $4,local
51 # ulw $4,global
micromips@ulw2-eb-ilocks.d 6 # Further checks of ulw macro (microMIPS).
micromips@ulw2-el-ilocks.d 6 # Further checks of ulw macro (microMIPS).
ulw2-eb-ilocks.d 6 # Further checks of ulw macro.
ulw2-eb.d 6 # Further checks of ulw macro.
ulw2-el-ilocks.d 6 # Further checks of ulw macro.
ulw2-el.d 6 # Further checks of ulw macro.
vxworks1-xgot-el.d 63 # ulw $4,local
73 # ulw $4,global
vxworks1-xgot.d 63 # ulw $4,local
73 # ulw $4,global
micromips.s     [all...]
  /external/valgrind/none/tests/mips32/
LoadStore.stdout.exp 286 ulw
287 ulw $t0, 0($t1) :: RTval: 0x0, out: 0x0
288 ulw $t0, 0($t1) :: RTval: 0x0, out: 0x121f1e1f
289 ulw $t0, 0($t1) :: RTval: 0x31415927, out: 0x0
290 ulw $t0, 0($t1) :: RTval: 0x31415927, out: 0x121f1e1f
291 ulw $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x0
292 ulw $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x121f1e1f
293 ulw $t0, 0($t1) :: RTval: 0x80000000, out: 0x0
294 ulw $t0, 0($t1) :: RTval: 0x80000000, out: 0x121f1e1f
295 ulw $t0, 2($t1) :: RTval: 0x80000000, out: 0x
    [all...]
LoadStore1.stdout.exp 286 ulw
287 ulw $t0, 0($t1) :: RTval: 0x0, out: 0x0
288 ulw $t0, 0($t1) :: RTval: 0x0, out: 0x121f1e1f
289 ulw $t0, 0($t1) :: RTval: 0x31415927, out: 0x0
290 ulw $t0, 0($t1) :: RTval: 0x31415927, out: 0x121f1e1f
291 ulw $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x0
292 ulw $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x121f1e1f
293 ulw $t0, 0($t1) :: RTval: 0x80000000, out: 0x0
294 ulw $t0, 0($t1) :: RTval: 0x80000000, out: 0x121f1e1f
295 ulw $t0, 2($t1) :: RTval: 0x80000000, out: 0x
    [all...]
  /bionic/libc/arch-mips/string/
strcpy.c 76 struct ulw struct
128 struct ulw *a = (struct ulw *)(dst); \
memcpy.c 140 struct ulw struct
147 unaligned_words (struct ulw *a, const reg_t * b,
memmove.c 155 struct ulw struct
185 unaligned_words_forward (struct ulw *a, const reg_t * b,
224 unaligned_words_backward (struct ulw *a, const reg_t * b,
  /external/llvm/test/MC/Mips/
mips-expansions-bad.s 38 ulw $5, 0
42 ulw $5, 1
46 ulw $5, 2
set-nomacro.s 66 ulw $8, 2
67 ulw $8, 0x8000
68 ulw $8, 2($9)
69 ulw $8, 0x8000($9)
189 ulw $8, 2
191 ulw $8, 0x8000
193 ulw $8, 2($9)
195 ulw $8, 0x8000($9)
mips64-expansions.s 193 # Test ulw with 64-bit immediate addresses.
194 ulw $8, 0x100010001
202 ulw $8, 0x1000100010001
212 ulw $8, -0x100010001
221 ulw $8, -0x1000100010001
231 # Test ulw with source register and 64-bit immediate offset.
232 ulw $8, 0x100010001($9)
241 ulw $8, 0x1000100010001($9)
252 ulw $8, -0x100010001($9)
262 ulw $8, -0x1000100010001($9
    [all...]

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