| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| gen6_sf_state.c | 40 * attribute in the VUE (relative to urb_entry_read_offset, see below), and a
49 * urb_entry_read_offset is the offset into the VUE at which the SF unit is
56 get_attr_override(struct brw_vue_map *vue_map, int urb_entry_read_offset,
87 /* Compute the location of the attribute relative to urb_entry_read_offset.
88 * Each increment of urb_entry_read_offset represents a 256-bit value, so
91 int source_attr = slot - 2 * urb_entry_read_offset;
132 int urb_entry_read_offset = 1; local
308 urb_entry_read_offset, attr,
331 urb_entry_read_offset << GEN6_SF_URB_ENTRY_READ_OFFSET_SHIFT;
|
| brw_gs_state.c | 67 gs->thread3.urb_entry_read_offset = 0;
|
| brw_sf.h | 95 int urb_entry_read_offset; member in struct:brw_sf_compile
|
| brw_sf.c | 79 c.urb_entry_read_offset = brw_sf_compute_urb_entry_read_offset(intel);
80 c.nr_attr_regs = (c.vue_map.num_slots + 1)/2 - c.urb_entry_read_offset;
|
| gen7_sf_state.c | 44 int urb_entry_read_offset = 1; local
106 urb_entry_read_offset, attr,
124 urb_entry_read_offset << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT;
|
| gen7_sol_state.c | 200 int urb_entry_read_offset = 0; local
202 urb_entry_read_offset;
221 dw2 |= urb_entry_read_offset << SO_STREAM_0_VERTEX_READ_OFFSET_SHIFT;
|
| brw_clip_state.c | 67 clip->thread3.urb_entry_read_offset = 0;
|
| brw_vs_state.c | 89 vs->thread3.urb_entry_read_offset = 0;
|
| brw_sf_state.c | 167 sf->thread3.urb_entry_read_offset =
|
| brw_state.h | 234 get_attr_override(struct brw_vue_map *vue_map, int urb_entry_read_offset,
|
| brw_wm_state.c | 130 wm->thread3.urb_entry_read_offset = 0;
|
| brw_sf_emit.c | 54 int vue_slot = (reg + c->urb_entry_read_offset) * 2 + half;
66 assert (vue_slot >= c->urb_entry_read_offset);
67 GLuint off = vue_slot / 2 - c->urb_entry_read_offset;
|
| brw_structs.h | 134 GLuint urb_entry_read_offset:6; member in struct:thread3
[all...] |
