| /external/llvm/test/MC/ARM/ |
| thumb2-dsp-diag.s | 21 uxtah r0, r0, r0 label
31 @ CHECK-7EM: uxtah r0, r0, r0 @ encoding: [0x10,0xfa,0x80,0xf0]
|
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| archv6.s | 147 uxtah r2, r3, r5
148 uxtah r2, r3, r5, ROR #8
|
| thumb2_bad_reg.s | 962 @ UXTAH
963 uxtah r13, r0, r1
964 uxtah r15, r0, r1
965 uxtah r0, r13, r1
966 uxtah r0, r15, r1
967 uxtah r0, r1, r13
968 uxtah r0, r1, r15
|
| arch7em.s | 157 uxtah r1, r2, r3
|
| archv6.d | 150 0+238 <[^>]*> e6f32075 ? uxtah r2, r3, r5
151 0+23c <[^>]*> e6f32475 ? uxtah r2, r3, r5, ror #8
|
| arch7em-bad.l | 132 [^:]*:157: Error: selected processor does not support Thumb mode `uxtah r1,r2,r3'
|
| arch7em.d | 139 0[0-9a-f]+ <[^>]+> fa12 f183 uxtah r1, r2, r3
|
| thumb2_bad_reg.l | [all...] |
| thumb32.s | 760 uxtah r1, r2, r3
|
| thumb32.d | [all...] |
| /external/valgrind/none/tests/arm/ |
| v6media.stdout.exp | [all...] |
| v6intARM.stdout.exp | [all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /external/v8/src/arm/ |
| assembler-arm.h | [all...] |
| assembler-arm.cc | 2035 void Assembler::uxtah(Register dst, Register src1, Register src2, int rotate, function in class:v8::internal::Assembler
[all...] |
| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-rn-operand-rm-a32.cc | 77 M(uxtah) \
[all...] |
| test-assembler-cond-rd-rn-operand-rm-t32.cc | 77 M(uxtah) \
[all...] |
| test-assembler-cond-rd-rn-operand-rm-ror-amount-a32.cc | 57 M(uxtah)
[all...] |
| test-assembler-cond-rd-rn-operand-rm-ror-amount-t32.cc | 57 M(uxtah)
[all...] |
| /external/v8/src/compiler/arm/ |
| code-generator-arm.cc | [all...] |
| /external/vixl/src/aarch32/ |
| assembler-aarch32.h | 3678 void uxtah(Register rd, Register rn, const Operand& operand) { function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.h | [all...] |
