/external/llvm/test/MC/AArch64/ |
noneon-diagnostics.s | 6 fmla v9.2s, v9.2s, v0.2s 14 // CHECK-ERROR-NEXT: fmla v9.2s, v9.2s, v0.2s 19 fmls v9.2s, v9.2s, v0.2s 28 // CHECK-ERROR-NEXT: fmls v9.2s, v9.2s, v0.2s 34 fmls.2s v9, v9, v [all...] |
arm64-diagno-predicate.s | 10 fmla v9.2s, v9.2s, v0.2s 12 // CHECK-ERROR-NEXT: fmla v9.2s, v9.2s, v0.2s
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neon-simd-misc.s | 12 rev64 v1.8b, v9.8b 19 // CHECK: rev64 v1.8b, v9.8b // encoding: [0x21,0x09,0x20,0x0e] 26 rev32 v0.4h, v9.4h 31 // CHECK: rev32 v0.4h, v9.4h // encoding: [0x20,0x09,0x60,0x2e] 45 saddlp v9.4s, v1.8h 52 // CHECK: saddlp v9.4s, v1.8h // encoding: [0x29,0x28,0x60,0x4e] 63 uaddlp v9.4s, v1.8h 70 // CHECK: uaddlp v9.4s, v1.8h // encoding: [0x29,0x28,0x60,0x6e] 81 sadalp v9.4s, v1.8h 88 // CHECK: sadalp v9.4s, v1.8h // encoding: [0x29,0x68,0x60,0x4e [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/sparc/ |
synth.s | 1 # common (v8 or v9) synthetic insns
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v9branch1.s | 1 # Check if maximum possible branch distances for v9 branches are accepted
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/toolchain/binutils/binutils-2.25/opcodes/ |
sparc-opc.c | 63 #define v9 (MASK_V9 | MASK_V9A | MASK_V9B) macro 64 /* v9 insns supported by leon. */ 68 /* v6 insns not supported by v9. */ 71 /* v9a instructions which would appear to be aliases to v9's impdep's 86 /* ??? Don't some v8 priviledged insns conflict with v9? */ 87 { "v9", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 }, 88 /* v9 with ultrasparc additions */ 90 /* v9 with cheetah additions */ 116 /* v9: Move (MOVcc and FMOVcc) condition field. */ 117 #define MCOND(x,i_or_f) ((((i_or_f) & 1) << 18) | (((x) >> 11) & (0xf << 14))) /* v9 */ [all...] |
/cts/tools/vm-tests-tf/src/dot/junit/opcodes/rem_double_2addr/d/ |
T_rem_double_2addr_5.d | 16 rem-double/2addr v9, v12 17 return-wide v9
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/cts/tools/vm-tests-tf/src/dot/junit/opcodes/shl_long_2addr/d/ |
T_shl_long_2addr_4.d | 16 shl-long/2addr v9, v10 17 return-wide v9
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T_shl_long_2addr_5.d | 16 shl-long/2addr v9, v10 17 return-wide v9
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/cts/tools/vm-tests-tf/src/dot/junit/opcodes/shr_long_2addr/d/ |
T_shr_long_2addr_4.d | 16 shr-long/2addr v9, v10 17 return-wide v9
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T_shr_long_2addr_5.d | 16 shr-long/2addr v9, v10 17 return-wide v9
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/frameworks/rs/cpu_ref/ |
rsCpuIntrinsics_advsimd_Convolve.S | 67 smull2 v9.4s, v2.8h, v0.h[0] 69 smlal v9.4s, v3.4h, v0.h[1] 71 smlal2 v9.4s, v3.8h, v0.h[2] 73 smlal2 v9.4s, v4.8h, v0.h[3] 75 smlal v9.4s, v5.4h, v0.h[4] 77 smlal2 v9.4s, v5.8h, v0.h[5] 79 smlal2 v9.4s, v6.8h, v0.h[6] 81 smlal v9.4s, v7.4h, v0.h[7] 83 smlal2 v9.4s, v7.8h, v1.h[0] 86 shrn2 v8.8h, v9.4s, # [all...] |
rsCpuIntrinsics_advsimd_3DLUT.S | 36 dup v9.8b, \yr1 41 umlsl v13.8h, v17.8b, v9.8b 43 umlal v13.8h, v19.8b, v9.8b 58 umlsl v15.8h, v17.8b, v9.8b 60 umlal v15.8h, v19.8b, v9.8b 64 ushll2 v9.4s, v12.8h, #8 66 umlsl2 v9.4s, v12.8h, \zr0 68 umlal2 v9.4s, v14.8h, \zr0 70 rshrn2 v10.8h, v9.4s, #8 74 ushll2 v9.4s, v13.8h, # [all...] |
rsCpuIntrinsics_advsimd_Resize.S | 53 ld1 {v9.8b}, [x5], #8 57 uxtl v9.8h, v9.8b 60 umull v12.4s, v9.4h, v3.h[1] 61 umull2 v13.4s, v9.8h, v3.h[1] 81 ld1 {v9.s}[0], [x5], #4 85 uxtl v9.8h, v9.8b 88 umull v12.4s, v9.4h, v3.h[1] 408 st1 {v8.16b,v9.16b}, [x0], #3 [all...] |
/cts/tools/vm-tests-tf/src/dot/junit/opcodes/filled_new_array/d/ |
T_filled_new_array_8.d | 23 invoke-direct {v9}, java/lang/Object/<init>()V 29 const v9, 0 30 filled-new-array {v5, v6, v7, v8, v9}, [I 37 filled-new-array {v5, v6, v7, v8, v9}, [I
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/external/clang/test/CodeGen/ |
vector-alignment.c | 48 double __attribute__((vector_size(24))) v9; variable 49 // SSE: @v9 {{.*}}, align 16 50 // AVX: @v9 {{.*}}, align 32 51 // AVX512: @v9 {{.*}}, align 32
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/external/libunwind/tests/ |
ppc64-test-altivec.c | 39 register vector signed int v9; local 142 v9 = 172 printf ("v9 - "); 173 vec_print (v9); 176 return v9;
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/external/llvm/test/MC/Hexagon/ |
v60lookup.s | 11 v31:30.h |= vlut16(v2.b, v9.h, r4) 12 # CHECK: 1b4ce2fe { v31:30.h |= vlut16(v2.b,v9.h,r4) }
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/external/libavc/encoder/armv8/ |
ih264e_evaluate_intra16x16_modes_av8.s | 164 ld1 {v9.16b}, [x1] 168 dup v20.8b, v9.b[15] ///HORIZONTAL VALUE ROW=0// 169 dup v21.8b, v9.b[15] ///HORIZONTAL VALUE ROW=0// 189 dup v20.8b, v9.b[14] ///HORIZONTAL VALUE ROW=1// 190 dup v21.8b, v9.b[14] 206 dup v20.8b, v9.b[13] ///HORIZONTAL VALUE ROW=2// 207 dup v21.8b, v9.b[13] 222 dup v20.8b, v9.b[12] ///HORIZONTAL VALUE ROW=3// 223 dup v21.8b, v9.b[12] 239 dup v20.8b, v9.b[11] ///HORIZONTAL VALUE ROW=0/ [all...] |
/cts/tests/tests/jni/src/android/jni/cts/ |
InstanceNonce.java | 70 int[] v9); 73 int v5, int v6, int v7, int v8, int v9,
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StaticNonce.java | 71 int[] v9); 74 int v5, int v6, int v7, int v8, int v9,
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/cts/tools/vm-tests-tf/src/dot/junit/opcodes/rem_double/d/ |
T_rem_double_5.d | 16 rem-double v0, v9, v12
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/cts/tools/vm-tests-tf/src/dot/junit/opcodes/shl_long/d/ |
T_shl_long_3.d | 16 shl-long v0, v7, v9
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T_shl_long_4.d | 16 shl-long v0, v9, v10
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T_shl_long_5.d | 16 shl-long v0, v9, v10
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