| /external/arm-neon-tests/ |
| ref_vcgt.c | 26 #define INSN_NAME vcgt
27 #define TEST_MSG "VCGT/VCGTQ"
|
| Android.mk | 26 vcgt vclt vbsl vshl vldX vdup_lane vrshrn_n vqdmull_lane \
|
| Makefile | 41 vcgt vclt vbsl vshl vldX vdup_lane vrshrn_n vqdmull_lane \
|
| /external/clang/test/CodeGen/ |
| 2007-09-05-ConstCtor.c | 11 const unsigned long vcgt = 1234; local
12 struct A a = { vcgt };
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| neon-cmp-encoding.s | 55 vcgt.s8 d16, d16, d17
56 vcgt.s16 d16, d16, d17
57 vcgt.s32 d16, d16, d17
58 vcgt.u8 d16, d16, d17
59 vcgt.u16 d16, d16, d17
60 vcgt.u32 d16, d16, d17
61 vcgt.f32 d16, d16, d17
62 vcgt.s8 q8, q8, q9
63 vcgt.s16 q8, q8, q9
64 vcgt.s32 q8, q8, q
[all...] |
| /external/llvm/test/MC/ARM/ |
| neon-cmp-encoding.s | 55 vcgt.s8 d16, d16, d17
56 vcgt.s16 d16, d16, d17
57 vcgt.s32 d16, d16, d17
58 vcgt.u8 d16, d16, d17
59 vcgt.u16 d16, d16, d17
60 vcgt.u32 d16, d16, d17
61 vcgt.f32 d16, d16, d17
62 vcgt.s8 q8, q8, q9
63 vcgt.s16 q8, q8, q9
64 vcgt.s32 q8, q8, q
[all...] |
| fullfp16-neon.s | 102 vcgt.f16 d2, d3, d4
103 vcgt.f16 q2, q3, q4
104 @ ARM: vcgt.f16 d2, d3, d4 @ encoding: [0x04,0x2e,0x33,0xf3]
105 @ ARM: vcgt.f16 q2, q3, q4 @ encoding: [0x48,0x4e,0x36,0xf3]
106 @ THUMB: vcgt.f16 d2, d3, d4 @ encoding: [0x33,0xff,0x04,0x2e]
107 @ THUMB: vcgt.f16 q2, q3, q4 @ encoding: [0x36,0xff,0x48,0x4e]
109 vcgt.f16 d2, d3, #0
110 vcgt.f16 q2, q3, #0
111 @ ARM: vcgt.f16 d2, d3, #0 @ encoding: [0x03,0x24,0xb5,0xf3]
112 @ ARM: vcgt.f16 q2, q3, #0 @ encoding: [0x46,0x44,0xb5,0xf3
[all...] |
| fullfp16-neon-neg.s | 76 vcgt.f16 d2, d3, d4
77 vcgt.f16 q2, q3, q4
81 vcgt.f16 d2, d3, #0
82 vcgt.f16 q2, q3, #0
|
| neon-bitwise-encoding.s | 310 vcgt.s16 q5, q3
311 vcgt.s16 d5, d3
316 vcgt.s16 q5, #0
317 vcgt.s16 d5, #0
363 @ CHECK: vcgt.s16 q5, q5, q3 @ encoding: [0x46,0xa3,0x1a,0xf2]
364 @ CHECK: vcgt.s16 d5, d5, d3 @ encoding: [0x03,0x53,0x15,0xf2]
369 @ CHECK: vcgt.s16 q5, q5, #0 @ encoding: [0x4a,0xa0,0xb5,0xf3]
370 @ CHECK: vcgt.s16 d5, d5, #0 @ encoding: [0x05,0x50,0xb5,0xf3]
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| neon-omit.s | 39 vcgt.u32 q7,q8
84 vcgt.u32 q7,q8,q3
|
| neon-omit.d | 40 0[0-9a-f]+ <[^>]+> f32ee360 vcgt\.u32 q7, q7, q8
42 0[0-9a-f]+ <[^>]+> f320e3ce vcgt\.u32 q7, q8, q7
82 0[0-9a-f]+ <[^>]+> f320e3c6 vcgt\.u32 q7, q8, q3
84 0[0-9a-f]+ <[^>]+> f326e360 vcgt\.u32 q7, q3, q8
|
| neon-cov.d | 578 0[0-9a-f]+ <[^>]+> f2000340 vcgt\.s8 q0, q0, q0
579 0[0-9a-f]+ <[^>]+> f2000340 vcgt\.s8 q0, q0, q0
580 0[0-9a-f]+ <[^>]+> f2000300 vcgt\.s8 d0, d0, d0
581 0[0-9a-f]+ <[^>]+> f2100340 vcgt\.s16 q0, q0, q0
582 0[0-9a-f]+ <[^>]+> f2100340 vcgt\.s16 q0, q0, q0
583 0[0-9a-f]+ <[^>]+> f2100300 vcgt\.s16 d0, d0, d0
584 0[0-9a-f]+ <[^>]+> f2200340 vcgt\.s32 q0, q0, q0
585 0[0-9a-f]+ <[^>]+> f2200340 vcgt\.s32 q0, q0, q0
586 0[0-9a-f]+ <[^>]+> f2200300 vcgt\.s32 d0, d0, d0
587 0[0-9a-f]+ <[^>]+> f3000340 vcgt\.u8 q0, q0, q
[all...] |
| neon-cov.s | 188 regs3_suf_32 vcgt vcgtq
202 regs2i_sf_0 vcgt vcgtq
|
| /external/valgrind/none/tests/arm/ |
| neon128.stdout.exp | [all...] |
| neon64.stdout.exp | [all...] |
| /external/libavc/common/arm/ |
| ih264_deblk_luma_a9.s | 120 vcgt.s32 q6, q6, #0 @Q6 = (us_Bs > 0)
125 vcgt.u8 q10, q8, q14 @Q10=(Ap<Beta)
126 vcgt.u8 q11, q8, q15 @Q11=(Aq<Beta)
686 vcgt.u8 q14, q14, q11 @ABS(p0 - q0) <((Alpha >>2) + 2)
688 vcgt.u8 q7, q13, q15 @beta>Ap
[all...] |
| ih264_deblk_chroma_a9.s | 302 vcgt.s16 d12, d12, #0 @Q6 = (us_Bs > 0)
433 vcgt.s16 q9, q7, #0
434 vcgt.s16 q10, q8, #0
633 vcgt.s16 q13, q14, #0
[all...] |
| /external/libvpx/libvpx/vpx_dsp/arm/ |
| loopfilter_8_neon.asm | 282 vcgt.u8 d21, d21, d2 ; (abs(p1 - p0) > thresh)*-1
288 vcgt.u8 d23, d22, d2 ; (abs(q1 - q0) > thresh)*-1
|
| loopfilter_16_neon.asm | 418 vcgt.u8 d21, d21, d18 ; (abs(p1 - p0) > thresh)*-1
419 vcgt.u8 d22, d22, d18 ; (abs(q1 - q0) > thresh)*-1
|
| loopfilter_neon.c | 79 *hev = vcgt##r##u8(max, thresh); \
[all...] |
| /external/libjpeg-turbo/simd/ |
| jsimd_arm_neon.S | [all...] |
| /external/vixl/src/aarch32/ |
| assembler-aarch32.h | 4015 void vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { function in class:vixl::aarch32::Assembler
4024 void vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { function in class:vixl::aarch32::Assembler
4030 void vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { function in class:vixl::aarch32::Assembler
4036 void vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.h | [all...] |
| disasm-aarch32.cc | 4165 void Disassembler::vcgt(Condition cond, function in class:vixl::aarch32::Disassembler
4179 void Disassembler::vcgt(Condition cond, function in class:vixl::aarch32::Disassembler
4193 void Disassembler::vcgt( function in class:vixl::aarch32::Disassembler
4204 void Disassembler::vcgt( function in class:vixl::aarch32::Disassembler
[all...] |
| assembler-aarch32.cc | 14196 void Assembler::vcgt(Condition cond, function in class:vixl::aarch32::Assembler
14236 void Assembler::vcgt(Condition cond, function in class:vixl::aarch32::Assembler
14276 void Assembler::vcgt( function in class:vixl::aarch32::Assembler
14323 void Assembler::vcgt( function in class:vixl::aarch32::Assembler
[all...] |
