| /external/arm-neon-tests/ |
| ref_vhsub.c | 26 #define INSN_NAME vhsub
27 #define TEST_MSG "VHSUB/VHSUBQ"
|
| Android.mk | 36 vhadd vrhadd vhsub vsubl vsubw vsubhn vrsubhn vmvn vqmovn \
|
| Makefile | 51 vhadd vrhadd vhsub vsubl vsubw vsubhn vrsubhn vmvn vqmovn \
|
| /external/llvm/test/MC/ARM/ |
| neon-sub-encoding.s | 73 @ CHECK: vhsub.s8 d16, d16, d17 @ encoding: [0xa1,0x02,0x40,0xf2]
74 vhsub.s8 d16, d16, d17
75 @ CHECK: vhsub.s16 d16, d16, d17 @ encoding: [0xa1,0x02,0x50,0xf2]
76 vhsub.s16 d16, d16, d17
77 @ CHECK: vhsub.s32 d16, d16, d17 @ encoding: [0xa1,0x02,0x60,0xf2]
78 vhsub.s32 d16, d16, d17
79 @ CHECK: vhsub.u8 d16, d16, d17 @ encoding: [0xa1,0x02,0x40,0xf3]
80 vhsub.u8 d16, d16, d17
81 @ CHECK: vhsub.u16 d16, d16, d17 @ encoding: [0xa1,0x02,0x50,0xf3]
82 vhsub.u16 d16, d16, d1
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| neon-sub-encoding.s | 47 @ CHECK: vhsub.s8 d16, d16, d17 @ encoding: [0xa1,0x02,0x40,0xf2]
48 vhsub.s8 d16, d16, d17
49 @ CHECK: vhsub.s16 d16, d16, d17 @ encoding: [0xa1,0x02,0x50,0xf2]
50 vhsub.s16 d16, d16, d17
51 @ CHECK: vhsub.s32 d16, d16, d17 @ encoding: [0xa1,0x02,0x60,0xf2]
52 vhsub.s32 d16, d16, d17
53 @ CHECK: vhsub.u8 d16, d16, d17 @ encoding: [0xa1,0x02,0x40,0xf3]
54 vhsub.u8 d16, d16, d17
55 @ CHECK: vhsub.u16 d16, d16, d17 @ encoding: [0xa1,0x02,0x50,0xf3]
56 vhsub.u16 d16, d16, d1
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| neon-omit.s | 10 vhsub.s32 q5,q7
59 vhsub.s32 q5,q8,q7
|
| neon-omit.d | 11 0[0-9a-f]+ <[^>]+> f22aa24e vhsub\.s32 q5, q5, q7
57 0[0-9a-f]+ <[^>]+> f220a2ce vhsub\.s32 q5, q8, q7
|
| neon-cov.d | 62 0[0-9a-f]+ <[^>]+> f2000240 vhsub\.s8 q0, q0, q0
63 0[0-9a-f]+ <[^>]+> f2000240 vhsub\.s8 q0, q0, q0
64 0[0-9a-f]+ <[^>]+> f2000200 vhsub\.s8 d0, d0, d0
65 0[0-9a-f]+ <[^>]+> f2100240 vhsub\.s16 q0, q0, q0
66 0[0-9a-f]+ <[^>]+> f2100240 vhsub\.s16 q0, q0, q0
67 0[0-9a-f]+ <[^>]+> f2100200 vhsub\.s16 d0, d0, d0
68 0[0-9a-f]+ <[^>]+> f2200240 vhsub\.s32 q0, q0, q0
69 0[0-9a-f]+ <[^>]+> f2200240 vhsub\.s32 q0, q0, q0
70 0[0-9a-f]+ <[^>]+> f2200200 vhsub\.s32 d0, d0, d0
71 0[0-9a-f]+ <[^>]+> f3000240 vhsub\.u8 q0, q0, q
[all...] |
| neon-cov.s | 48 regs3_su_32 vhsub vhsubq
|
| /external/libhevc/common/arm/ |
| ihevc_intra_pred_luma_vert.s | 194 vhsub.u8 q13, q13, q11 @(src[2nt-1-row] - src[2nt])>>1
330 vhsub.u8 d26, d26, d22 @(src[2nt-1-row] - src[2nt])>>1
|
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/x86/x86asm/ |
| objdump_test.go | 239 vhsub
|
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/x86/x86asm/ |
| objdump_test.go | 239 vhsub
|
| /external/valgrind/none/tests/arm/ |
| neon64.stdout.exp | 294 ---- VHSUB ----
295 vhsub.s32 d0, d1, d2 :: Qd 0xffffffd0 0xffffffd0 Qm (i32)0x00000018 Qn (i32)0x00000078
296 vhsub.s32 d0, d1, d2 :: Qd 0x03830246 0x01810044 Qm (i32)0x00000018 Qn (i32)0x00000078
297 vhsub.s32 d0, d1, d2 :: Qd 0x0000000a 0x0000000a Qm (i32)0x0000008c Qn (i32)0x00000078
298 vhsub.s32 d0, d1, d2 :: Qd 0x03830246 0x01810044 Qm (i32)0x0000008c Qn (i32)0x00000078
299 vhsub.s16 d0, d1, d2 :: Qd 0x0000000a 0x0000000a Qm (i32)0x0000008c Qn (i32)0x00000078
300 vhsub.s16 d0, d1, d2 :: Qd 0x03830246 0x01810044 Qm (i32)0x0000008c Qn (i32)0x00000078
301 vhsub.s8 d0, d1, d2 :: Qd 0x0000008a 0x0000008a Qm (i32)0x0000008c Qn (i32)0x00000078
302 vhsub.s8 d0, d1, d2 :: Qd 0x030302c6 0x010100c4 Qm (i32)0x0000008c Qn (i32)0x00000078
303 vhsub.s8 d0, d1, d2 :: Qd 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x8000000
[all...] |
| neon128.stdout.exp | 200 ---- VHSUB ----
201 vhsub.s32 q0, q1, q2 :: Qd 0xffffffd0 0xffffffd0 0xffffffd0 0xffffffd0 Qm (i32)0x00000018 Qn (i32)0x00000078
202 vhsub.s32 q0, q1, q2 :: Qd 0x0000000a 0x0000000a 0x0000000a 0x0000000a Qm (i32)0x0000008c Qn (i32)0x00000078
203 vhsub.s16 q0, q1, q2 :: Qd 0x0000000a 0x0000000a 0x0000000a 0x0000000a Qm (i32)0x0000008c Qn (i32)0x00000078
204 vhsub.s8 q0, q1, q2 :: Qd 0x0000008a 0x0000008a 0x0000008a 0x0000008a Qm (i32)0x0000008c Qn (i32)0x00000078
205 vhsub.s8 q0, q1, q2 :: Qd 0x000000ff 0x000000ff 0x000000ff 0x000000ff Qm (i32)0x80000001 Qn (i32)0x80000002
206 vhsub.s16 q0, q1, q2 :: Qd 0x0000ffff 0x0000ffff 0x0000ffff 0x0000ffff Qm (i32)0x80000001 Qn (i32)0x80000002
207 vhsub.s32 q0, q1, q2 :: Qd 0xffffffff 0xffffffff 0xffffffff 0xffffffff Qm (i32)0x80000001 Qn (i32)0x80000002
208 vhsub.s32 q10, q11, q12 :: Qd 0xffffffd0 0xffffffd0 0xffffffd0 0xffffffd0 Qm (i32)0x00000018 Qn (i32)0x00000078
209 vhsub.u32 q0, q1, q2 :: Qd 0xffffffd0 0xffffffd0 0xffffffd0 0xffffffd0 Qm (i32)0x00000018 Qn (i32)0x00 (…)
[all...] |
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_neon_Resize.S | 491 vhsub.s16 q3, q10, q9
|
| /external/vixl/src/aarch32/ |
| assembler-aarch32.h | 4451 void vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) { function in class:vixl::aarch32::Assembler
4457 void vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) { function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.h | [all...] |
| disasm-aarch32.cc | 4914 void Disassembler::vhsub( function in class:vixl::aarch32::Disassembler
4925 void Disassembler::vhsub( function in class:vixl::aarch32::Disassembler
[all...] |
| assembler-aarch32.cc | 16750 void Assembler::vhsub( function in class:vixl::aarch32::Assembler
16780 void Assembler::vhsub( function in class:vixl::aarch32::Assembler
[all...] |
| macro-assembler-aarch32.h | [all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-arm.c | [all...] |
