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  /external/vixl/src/aarch32/
label-aarch32.cc 1 // Copyright 2016, VIXL authors
31 namespace vixl { namespace
51 } // namespace vixl
  /external/vixl/src/
platform-vixl.h 1 // Copyright 2014, VIXL authors
35 namespace vixl { namespace
37 } // namespace vixl
macro-assembler-interface.h 1 // Copyright 2016, VIXL authors
30 #include "assembler-base-vixl.h"
32 namespace vixl { namespace
56 } // namespace vixl
  /external/vixl/test/
test-runner.cc 1 // Copyright 2014, VIXL authors
34 vixl::Test* vixl::Test::first_ = NULL;
35 vixl::Test* vixl::Test::last_ = NULL;
38 bool vixl::Test::debug_ = false;
41 bool vixl::Test::trace_sim_ = false;
42 bool vixl::Test::trace_reg_ = false;
43 bool vixl::Test::trace_write_ = false;
44 bool vixl::Test::trace_branch_ = false
    [all...]
test-utils.h 1 // Copyright 2015, VIXL authors
30 #include "globals-vixl.h"
34 namespace vixl { namespace
38 } // namespace vixl
test-code-buffer.cc 1 // Copyright 2016, VIXL authors
28 #include "code-buffer-vixl.h"
31 namespace vixl { namespace
53 } // namespace vixl
test-aborts.cc 1 // Copyright 2016, VIXL authors
30 #include "globals-vixl.h"
38 namespace vixl { namespace
68 } // namespace vixl
  /art/compiler/optimizing/
common_arm64.h 26 // TODO(VIXL): Make VIXL compile with -Wshadow.
42 // Convenience helpers to ease conversion to and from VIXL operands.
48 return vixl::aarch64::kSPRegInternalCode;
51 return vixl::aarch64::kZeroRegCode;
57 if (code == vixl::aarch64::kSPRegInternalCode) {
60 if (code == vixl::aarch64::kZeroRegCode) {
66 inline vixl::aarch64::Register XRegisterFrom(Location location) {
68 return vixl::aarch64::Register::GetXRegFromCode(VIXLRegCodeFromART(location.reg()));
71 inline vixl::aarch64::Register WRegisterFrom(Location location)
    [all...]
common_arm.h 26 // TODO(VIXL): Make VIXL compile with -Wshadow.
39 static_assert(vixl::aarch32::kSpCode == SP, "vixl::aarch32::kSpCode must equal ART's SP");
41 inline dwarf::Reg DWARFReg(vixl::aarch32::Register reg) {
45 inline dwarf::Reg DWARFReg(vixl::aarch32::SRegister reg) {
49 inline vixl::aarch32::Register HighRegisterFrom(Location location) {
51 return vixl::aarch32::Register(location.AsRegisterPairHigh<vixl::aarch32::Register>());
54 inline vixl::aarch32::DRegister HighDRegisterFrom(Location location)
    [all...]
code_generator_arm64.h 31 // TODO(VIXL): Make VIXL compile with -Wshadow.
48 static constexpr int kMaxMacroInstructionSizeInBytes = 15 * vixl::aarch64::kInstructionSize;
51 static const vixl::aarch64::Register kParameterCoreRegisters[] = {
52 vixl::aarch64::x1,
53 vixl::aarch64::x2,
54 vixl::aarch64::x3,
55 vixl::aarch64::x4,
56 vixl::aarch64::x5,
57 vixl::aarch64::x6
    [all...]
code_generator_arm_vixl.h 30 // TODO(VIXL): make vixl clean wrt -Wshadow.
38 // Default to use the VIXL-based backend on ARM.
51 15 * vixl::aarch32::kMaxInstructionSizeInBytes;
53 static const vixl::aarch32::Register kParameterCoreRegistersVIXL[] = {
54 vixl::aarch32::r1,
55 vixl::aarch32::r2,
56 vixl::aarch32::r3
59 static const vixl::aarch32::SRegister kParameterFpuRegistersVIXL[] = {
60 vixl::aarch32::s0
    [all...]
intrinsics_arm64.h 22 namespace vixl { namespace
27 }} // namespace vixl::aarch64
79 vixl::aarch64::MacroAssembler* GetVIXLAssembler();
  /art/compiler/utils/arm64/
assembler_arm64.h 30 // TODO(VIXL): Make VIXL compile with -Wshadow.
40 #define MEM_OP(...) vixl::aarch64::MemOperand(__VA_ARGS__)
68 vixl::aarch64::MacroAssembler* GetVIXLAssembler() { return &vixl_masm_; }
82 void SpillRegisters(vixl::aarch64::CPURegList registers, int offset);
83 void UnspillRegisters(vixl::aarch64::CPURegList registers, int offset);
93 void PoisonHeapReference(vixl::aarch64::Register reg);
95 void UnpoisonHeapReference(vixl::aarch64::Register reg);
97 void MaybePoisonHeapReference(vixl::aarch64::Register reg);
99 void MaybeUnpoisonHeapReference(vixl::aarch64::Register reg)
    [all...]
managed_register_arm64_test.cc 594 EXPECT_TRUE(vixl::aarch64::x0.Is(Arm64Assembler::reg_x(X0)));
595 EXPECT_TRUE(vixl::aarch64::x1.Is(Arm64Assembler::reg_x(X1)));
596 EXPECT_TRUE(vixl::aarch64::x2.Is(Arm64Assembler::reg_x(X2)));
597 EXPECT_TRUE(vixl::aarch64::x3.Is(Arm64Assembler::reg_x(X3)));
598 EXPECT_TRUE(vixl::aarch64::x4.Is(Arm64Assembler::reg_x(X4)));
599 EXPECT_TRUE(vixl::aarch64::x5.Is(Arm64Assembler::reg_x(X5)));
600 EXPECT_TRUE(vixl::aarch64::x6.Is(Arm64Assembler::reg_x(X6)));
601 EXPECT_TRUE(vixl::aarch64::x7.Is(Arm64Assembler::reg_x(X7)));
602 EXPECT_TRUE(vixl::aarch64::x8.Is(Arm64Assembler::reg_x(X8)));
603 EXPECT_TRUE(vixl::aarch64::x9.Is(Arm64Assembler::reg_x(X9)))
    [all...]
  /art/disassembler/
disassembler_arm64.h 22 // TODO(VIXL): Make VIXL compile with -Wshadow.
32 class CustomDisassembler FINAL : public vixl::aarch64::Disassembler {
35 : vixl::aarch64::Disassembler(),
42 reinterpret_cast<const vixl::aarch64::Instruction*>(options->base_address_));
47 void AppendRegisterNameToOutput(const vixl::aarch64::Instruction* instr,
48 const vixl::aarch64::CPURegister& reg) OVERRIDE;
51 void VisitLoadLiteral(const vixl::aarch64::Instruction* instr) OVERRIDE;
54 void VisitLoadStoreUnsignedOffset(const vixl::aarch64::Instruction* instr) OVERRIDE;
83 vixl::aarch64::Decoder decoder
    [all...]
  /art/runtime/simulator/
code_simulator_arm64.h 23 // TODO(VIXL): Make VIXL compile with -Wshadow.
46 vixl::aarch64::Decoder* decoder_;
47 vixl::aarch64::Simulator* simulator_;
  /external/vixl/benchmarks/aarch64/
bench-branch-link.cc 1 // Copyright 2015, VIXL authors
27 #include "globals-vixl.h"
32 using namespace vixl;
33 using namespace vixl::aarch64;
  /external/vixl/examples/aarch64/
examples.h 1 // Copyright 2015, VIXL authors
33 using namespace vixl;
34 using namespace vixl::aarch64;
108 // This example demonstrates some interesting features of VIXL's stack
custom-disassembler.h 1 // Copyright 2014, VIXL authors
32 using namespace vixl::aarch64;
getting-started.cc 1 // Copyright 2014, VIXL authors
32 using namespace vixl::aarch64;
  /art/compiler/utils/arm/
managed_register_arm.h 25 // TODO(VIXL): Make VIXL compile with -Wshadow.
99 vixl::aarch32::Register AsVIXLRegister() const {
101 return vixl::aarch32::Register(id_);
109 vixl::aarch32::SRegister AsVIXLSRegister() const {
111 return vixl::aarch32::SRegister(id_ - kNumberOfCoreRegIds);
119 vixl::aarch32::DRegister AsVIXLDRegister() const {
121 return vixl::aarch32::DRegister(id_ - kNumberOfCoreRegIds - kNumberOfSRegIds);
152 vixl::aarch32::Register AsVIXLRegisterPairLow() const {
153 return vixl::aarch32::Register(AsRegisterPairLow())
    [all...]
  /external/vixl/src/aarch64/
cpu-aarch64.h 1 // Copyright 2014, VIXL authors
30 #include "../globals-vixl.h"
34 namespace vixl { namespace
84 } // namespace vixl
  /external/vixl/benchmarks/aarch32/
bench-branch-link-masm.cc 1 // Copyright 2016, VIXL authors
35 using namespace vixl;
36 using namespace vixl::aarch32;
bench-branch-masm.cc 1 // Copyright 2016, VIXL authors
35 using namespace vixl;
36 using namespace vixl::aarch32;
bench-dataop.cc 1 // Copyright 2016, VIXL authors
35 using namespace vixl;
36 using namespace vixl::aarch32;

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