| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| neon-const.s | 7 vmov.f32 q0, 0.0
9 vmov.f32 q0, 2.0
10 vmov.f32 q0, 4.0
11 vmov.f32 q0, 8.0
12 vmov.f32 q0, 16.0
13 vmov.f32 q0, 0.125
14 vmov.f32 q0, 0.25
15 vmov.f32 q0, 0.5
16 vmov.f32 q0, 1.0
18 vmov.f32 q0, 2.12
[all...] |
| neon-vmov-bad.s | 3 vmov Q0, d0
|
| neon-vmov-bad.d | 1 # name: Bad shape for vmov
3 # error-output: neon-vmov-bad.l
|
| neon-const.d | 8 0[0-9a-f]+ <[^>]+> f2800050 vmov\.i32 q0, #0 ; 0x00000000
9 0[0-9a-f]+ <[^>]+> f2800f50 vmov\.f32 q0, #2 ; 0x40000000
10 0[0-9a-f]+ <[^>]+> f2810f50 vmov\.f32 q0, #4 ; 0x40800000
11 0[0-9a-f]+ <[^>]+> f2820f50 vmov\.f32 q0, #8 ; 0x41000000
12 0[0-9a-f]+ <[^>]+> f2830f50 vmov\.f32 q0, #16 ; 0x41800000
13 0[0-9a-f]+ <[^>]+> f2840f50 vmov\.f32 q0, #0\.125 ; 0x3e000000
14 0[0-9a-f]+ <[^>]+> f2850f50 vmov\.f32 q0, #0\.25 ; 0x3e800000
15 0[0-9a-f]+ <[^>]+> f2860f50 vmov\.f32 q0, #0\.5 ; 0x3f000000
16 0[0-9a-f]+ <[^>]+> f2870f50 vmov\.f32 q0, #1 ; 0x3f800000
17 0[0-9a-f]+ <[^>]+> f2800f51 vmov\.f32 q0, #2\.125 ; 0x4008000
[all...] |
| neon-vmov-bad.l | 2 [^:]*:3: Error: invalid instruction shape -- `vmov Q0,d0'
|
| vfp2.d | 10 0+000 <[^>]*> ec4a5b10 vmov d0, r5, sl
11 0+004 <[^>]*> ec5a5b10 vmov r5, sl, d0
12 0+008 <[^>]*> ec4a5a37 (vmov s15, s16, r5, sl|fmsrr {s15, s16}, r5, sl)
13 0+00c <[^>]*> ec5a5a37 (vmov r5, sl, s15, s16|fmrrs r5, sl, {s15, s16})
14 0+010 <[^>]*> ec45ab1f vmov d15, sl, r5
15 0+014 <[^>]*> ec55ab1f vmov sl, r5, d15
16 0+018 <[^>]*> ec45aa38 (vmov s17, s18, sl, r5|fmsrr {s17, s18}, sl, r5)
17 0+01c <[^>]*> ec55aa38 (vmov sl, r5, s17, s18|fmrrs sl, r5, {s17, s18})
|
| vfp2_t2.d | 10 0+000 <[^>]*> ec4a 5b10 vmov d0, r5, sl
11 0+004 <[^>]*> ec5a 5b10 vmov r5, sl, d0
12 0+008 <[^>]*> ec4a 5a37 (vmov s15, s16, r5, sl|fmsrr {s15, s16}, r5, sl)
13 0+00c <[^>]*> ec5a 5a37 (vmov r5, sl, s15, s16|fmrrs r5, sl, {s15, s16})
14 0+010 <[^>]*> ec45 ab1f vmov d15, sl, r5
15 0+014 <[^>]*> ec55 ab1f vmov sl, r5, d15
16 0+018 <[^>]*> ec45 aa38 (vmov s17, s18, sl, r5|fmsrr {s17, s18}, sl, r5)
17 0+01c <[^>]*> ec55 aa38 (vmov sl, r5, s17, s18|fmrrs sl, r5, {s17, s18})
|
| /external/compiler-rt/lib/builtins/arm/ |
| adddf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
22 vmov d7, r2, r3 // move second param from r2/r3 pair into d7
24 vmov r0, r1, d6 // move result back to r0/r1 pair
|
| addsf3vfp.S | 21 vmov s14, r0 // move first param from r0 into float register
22 vmov s15, r1 // move second param from r1 into float register
24 vmov r0, s14 // move result back to r0
|
| divdf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
22 vmov d7, r2, r3 // move second param from r2/r3 pair into d7
24 vmov r0, r1, d5 // move result back to r0/r1 pair
|
| divsf3vfp.S | 21 vmov s14, r0 // move first param from r0 into float register
22 vmov s15, r1 // move second param from r1 into float register
24 vmov r0, s13 // move result back to r0
|
| muldf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
22 vmov d7, r2, r3 // move second param from r2/r3 pair into d7
24 vmov r0, r1, d6 // move result back to r0/r1 pair
|
| mulsf3vfp.S | 21 vmov s14, r0 // move first param from r0 into float register
22 vmov s15, r1 // move second param from r1 into float register
24 vmov r0, s13 // move result back to r0
|
| subdf3vfp.S | 21 vmov d6, r0, r1 // move first param from r0/r1 pair into d6
22 vmov d7, r2, r3 // move second param from r2/r3 pair into d7
24 vmov r0, r1, d6 // move result back to r0/r1 pair
|
| subsf3vfp.S | 22 vmov s14, r0 // move first param from r0 into float register
23 vmov s15, r1 // move second param from r1 into float register
25 vmov r0, s14 // move result back to r0
|
| eqdf2vfp.S | 22 vmov d6, r0, r1 // load r0/r1 pair in double register
23 vmov d7, r2, r3 // load r2/r3 pair in double register
|
| eqsf2vfp.S | 22 vmov s14, r0 // move from GPR 0 to float register
23 vmov s15, r1 // move from GPR 1 to float register
|
| extendsfdf2vfp.S | 22 vmov s15, r0 // load float register from R0
24 vmov r0, r1, d7 // return result in r0/r1 pair
|
| fixdfsivfp.S | 22 vmov d7, r0, r1 // load double register from R0/R1
24 vmov r0, s15 // move s15 to result register
|
| fixsfsivfp.S | 22 vmov s15, r0 // load float register from R0
24 vmov r0, s15 // move s15 to result register
|
| fixunsdfsivfp.S | 23 vmov d7, r0, r1 // load double register from R0/R1
25 vmov r0, s15 // move s15 to result register
|
| fixunssfsivfp.S | 23 vmov s15, r0 // load float register from R0
25 vmov r0, s15 // move s15 to result register
|
| floatsidfvfp.S | 22 vmov s15, r0 // move int to float register s15
24 vmov r0, r1, d7 // move d7 to result register pair r0/r1
|
| /bionic/libm/arm/ |
| sqrt.S | 36 vmov.f64 d0, r0, r1
38 vmov.f64 r0, r1, d0
43 vmov.f32 s0, r0
45 vmov.f32 r0, s0
|
| /external/llvm/test/MC/ARM/ |
| vmov-vmvn-byte-replicate.s | 1 @ PR18921, "vmov" part.
5 @ CHECK: vmov.i8 d2, #0xff @ encoding: [0x1f,0x2e,0x87,0xf3]
6 @ CHECK: vmov.i8 q2, #0xff @ encoding: [0x5f,0x4e,0x87,0xf3]
7 @ CHECK: vmov.i8 d2, #0xab @ encoding: [0x1b,0x2e,0x82,0xf3]
8 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
9 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
10 @ CHECK: vmov.i8 q2, #0xab @ encoding: [0x5b,0x4e,0x82,0xf3]
12 @ CHECK: vmov.i8 d2, #0x0 @ encoding: [0x10,0x2e,0x80,0xf2]
13 @ CHECK: vmov.i8 q2, #0x0 @ encoding: [0x50,0x4e,0x80,0xf2]
14 @ CHECK: vmov.i8 d2, #0x54 @ encoding: [0x14,0x2e,0x85,0xf2
[all...] |
