/external/llvm/test/MC/ARM/ |
neont2-shift-encoding.s | 93 @ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0x40,0xef,0xa1,0x05] 94 vrshl.s8 d16, d17, d16 95 @ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0x50,0xef,0xa1,0x05] 96 vrshl.s16 d16, d17, d16 97 @ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0x60,0xef,0xa1,0x05] 98 vrshl.s32 d16, d17, d16 99 @ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0x70,0xef,0xa1,0x05] 100 vrshl.s64 d16, d17, d16 101 @ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0x40,0xff,0xa1,0x05] 102 vrshl.u8 d16, d17, d1 [all...] |
neon-shift-encoding.s | 281 vrshl.s8 d16, d17, d16 282 vrshl.s16 d16, d17, d16 283 vrshl.s32 d16, d17, d16 284 vrshl.s64 d16, d17, d16 285 vrshl.u8 d16, d17, d16 286 vrshl.u16 d16, d17, d16 287 vrshl.u32 d16, d17, d16 288 vrshl.u64 d16, d17, d16 289 vrshl.s8 q8, q9, q8 290 vrshl.s16 q8, q9, q [all...] |
/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
neont2-shift-encoding.s | 93 @ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0x40,0xef,0xa1,0x05] 94 vrshl.s8 d16, d17, d16 95 @ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0x50,0xef,0xa1,0x05] 96 vrshl.s16 d16, d17, d16 97 @ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0x60,0xef,0xa1,0x05] 98 vrshl.s32 d16, d17, d16 99 @ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0x70,0xef,0xa1,0x05] 100 vrshl.s64 d16, d17, d16 101 @ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0x40,0xff,0xa1,0x05] 102 vrshl.u8 d16, d17, d1 [all...] |
neon-shift-encoding.s | 156 @ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xf2] 157 vrshl.s8 d16, d17, d16 158 @ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xf2] 159 vrshl.s16 d16, d17, d16 160 @ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xf2] 161 vrshl.s32 d16, d17, d16 162 @ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0xf2] 163 vrshl.s64 d16, d17, d16 164 @ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xf3] 165 vrshl.u8 d16, d17, d1 [all...] |
/external/libavc/common/arm/ |
ih264_weighted_pred_a9q.s | 148 vrshl.s16 q2, q2, q0 @rounds off the weighted samples from rows 1,2 149 vrshl.s16 q3, q3, q0 @rounds off the weighted samples from rows 3,4 182 vrshl.s16 q2, q2, q0 @rounds off the weighted samples from row 1 183 vrshl.s16 q3, q3, q0 @rounds off the weighted samples from row 2 184 vrshl.s16 q4, q4, q0 @rounds off the weighted samples from row 3 186 vrshl.s16 q5, q5, q0 @rounds off the weighted samples from row 4 229 vrshl.s16 q6, q6, q0 @rounds off the weighted samples from row 1L 232 vrshl.s16 q7, q7, q0 @rounds off the weighted samples from row 1H 233 vrshl.s16 q8, q8, q0 @rounds off the weighted samples from row 2L 235 vrshl.s16 q9, q9, q0 @rounds off the weighted samples from row 2 [all...] |
ih264_weighted_bi_pred_a9q.s | 190 vrshl.s16 q2, q2, q0 @rounds off the weighted samples from rows 1,2 191 vrshl.s16 q4, q4, q0 @rounds off the weighted samples from rows 3,4 238 vrshl.s16 q2, q2, q0 @rounds off the weighted samples from row 1 239 vrshl.s16 q4, q4, q0 @rounds off the weighted samples from row 2 240 vrshl.s16 q6, q6, q0 @rounds off the weighted samples from row 3 242 vrshl.s16 q8, q8, q0 @rounds off the weighted samples from row 4 311 vrshl.s16 q10, q10, q0 @rounds off the weighted samples from row 1L 315 vrshl.s16 q2, q2, q0 @rounds off the weighted samples from row 1H 317 vrshl.s16 q12, q12, q0 @rounds off the weighted samples from row 2L 319 vrshl.s16 q4, q4, q0 @rounds off the weighted samples from row 2 [all...] |
/external/arm-neon-tests/ |
Android.mk | 29 vmlsl_lane vmovl vmovn vmull vmull_lane vrev vrshl vshl_n \
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Makefile | 44 vmlsl_lane vmovl vmovn vmull vmull_lane vrev vrshl vshl_n \
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ref_vrshl.c | 34 #define TEST_MSG "VRSHL/VRSHLQ" 37 /* Basic test: v3=vrshl(v1,v2), then store the result. */ 40 vrshl##Q##_##T2##W(VECT_VAR(vector, T1, W, N), \
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/external/valgrind/none/tests/arm/ |
neon64.stdout.exp | [all...] |
neon128.stdout.exp | [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
neon-cov.d | 128 0[0-9a-f]+ <[^>]+> f2000540 vrshl\.s8 q0, q0, q0 129 0[0-9a-f]+ <[^>]+> f2000540 vrshl\.s8 q0, q0, q0 130 0[0-9a-f]+ <[^>]+> f2000500 vrshl\.s8 d0, d0, d0 131 0[0-9a-f]+ <[^>]+> f2100540 vrshl\.s16 q0, q0, q0 132 0[0-9a-f]+ <[^>]+> f2100540 vrshl\.s16 q0, q0, q0 133 0[0-9a-f]+ <[^>]+> f2100500 vrshl\.s16 d0, d0, d0 134 0[0-9a-f]+ <[^>]+> f2200540 vrshl\.s32 q0, q0, q0 135 0[0-9a-f]+ <[^>]+> f2200540 vrshl\.s32 q0, q0, q0 136 0[0-9a-f]+ <[^>]+> f2200500 vrshl\.s32 d0, d0, d0 137 0[0-9a-f]+ <[^>]+> f2300540 vrshl\.s64 q0, q0, q [all...] |
neon-cov.s | 63 regs3_su_64 vrshl vrshlq
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/external/vixl/src/aarch32/ |
assembler-aarch32.h | 5525 void vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) { function in class:vixl::aarch32::Assembler 5531 void vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) { function in class:vixl::aarch32::Assembler [all...] |
disasm-aarch32.h | [all...] |
disasm-aarch32.cc | 6354 void Disassembler::vrshl( function in class:vixl::aarch32::Disassembler 6365 void Disassembler::vrshl( function in class:vixl::aarch32::Disassembler [all...] |
assembler-aarch32.cc | 23401 void Assembler::vrshl( function in class:vixl::aarch32::Assembler 23431 void Assembler::vrshl( function in class:vixl::aarch32::Assembler [all...] |
macro-assembler-aarch32.h | [all...] |
/toolchain/binutils/binutils-2.25/gas/config/ |
tc-arm.c | [all...] |