| /external/llvm/test/MC/ARM/ |
| neont2-shift-encoding.s | 125 @ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0xc8,0xef,0x30,0x02]
126 vrshr.s8 d16, d16, #8
127 @ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0xd0,0xef,0x30,0x02]
128 vrshr.s16 d16, d16, #16
129 @ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0xe0,0xef,0x30,0x02]
130 vrshr.s32 d16, d16, #32
131 @ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xc0,0xef,0xb0,0x02]
132 vrshr.s64 d16, d16, #64
133 @ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0xc8,0xff,0x30,0x02]
134 vrshr.u8 d16, d16, #
[all...] |
| neon-shift-encoding.s | 315 vrshr.s8 d16, d16, #8
316 vrshr.s16 d16, d16, #16
317 vrshr.s32 d16, d16, #32
318 vrshr.s64 d16, d16, #64
319 vrshr.u8 d16, d16, #8
320 vrshr.u16 d16, d16, #16
321 vrshr.u32 d16, d16, #32
322 vrshr.u64 d16, d16, #64
323 vrshr.s8 q8, q8, #8
324 vrshr.s16 q8, q8, #1
[all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| neont2-shift-encoding.s | 125 @ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0xc8,0xef,0x30,0x02]
126 vrshr.s8 d16, d16, #8
127 @ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0xd0,0xef,0x30,0x02]
128 vrshr.s16 d16, d16, #16
129 @ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0xe0,0xef,0x30,0x02]
130 vrshr.s32 d16, d16, #32
131 @ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xc0,0xef,0xb0,0x02]
132 vrshr.s64 d16, d16, #64
133 @ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0xc8,0xff,0x30,0x02]
134 vrshr.u8 d16, d16, #
[all...] |
| neon-shift-encoding.s | 188 @ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xf2]
189 vrshr.s8 d16, d16, #8
190 @ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xf2]
191 vrshr.s16 d16, d16, #16
192 @ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xf2]
193 vrshr.s32 d16, d16, #32
194 @ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xf2]
195 vrshr.s64 d16, d16, #64
196 @ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xf3]
197 vrshr.u8 d16, d16, #
[all...] |
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_neon_Blend.S | 288 vrshr.u16 q8, q0, #8
289 vrshr.u16 q4, q12, #8
290 vrshr.u16 q9, q1, #8
291 vrshr.u16 q5, q13, #8
292 vrshr.u16 q10, q2, #8
293 vrshr.u16 q6, q14, #8
335 vrshr.u16 q8, q0, #8
336 vrshr.u16 q4, q12, #8
337 vrshr.u16 q9, q1, #8
338 vrshr.u16 q5, q13, #
[all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| neon-omit.s | 47 vrshr.s8 q2,#5
92 vrshr.s8 q2,q9,#5
|
| neon-omit.d | 48 0[0-9a-f]+ <[^>]+> f28b4254 vrshr\.s8 q2, q2, #5
90 0[0-9a-f]+ <[^>]+> f28b4272 vrshr\.s8 q2, q9, #5
|
| neon-cov.d | [all...] |
| neon-cov.s | 342 rshift_imm vrshr vrshrq
|
| /external/libhevc/common/arm/ |
| ihevc_deblk_chroma_horz.s | 125 vrshr.s16 q3,q3,#3
|
| ihevc_deblk_chroma_vert.s | 123 vrshr.s16 q3,q2,#3
|
| ihevc_deblk_luma_horz.s | 450 vrshr.s16 q5,q5,#4
|
| ihevc_deblk_luma_vert.s | 447 vrshr.s16 q8,q8,#4
|
| /external/libavc/common/arm/ |
| ih264_iquant_itrans_recon_a9.s | 211 vrshr.s16 q10, q10, #6 @
212 vrshr.s16 q11, q11, #6
387 vrshr.s16 q10, q10, #6 @
388 vrshr.s16 q11, q11, #6
822 vrshr.s16 q1, q1, #6 @
824 vrshr.s16 q2, q2, #6 @
825 vrshr.s16 q4, q4, #6 @
827 vrshr.s16 q5, q5, #6 @
828 vrshr.s16 q7, q7, #6 @
830 vrshr.s16 q0, q0, #6
[all...] |
| ih264_intra_pred_luma_16x16_a9q.s | 437 vrshr.s32 d0, d0, #6 @ i_b = D0[0]
|
| ih264_iquant_itrans_recon_dc_a9.s | 360 vrshr.s16 d0, d0, #6 @i_macro = ((q0 + 32) >> 6);
|
| ih264_deblk_chroma_a9.s | 430 vrshr.s16 q7, q7, #3
431 vrshr.s16 q8, q8, #3 @(((q0 - p0) << 2) + (p1 - q1) + 4) >> 3)
631 vrshr.s16 q14, q14, #3 @(((q0 - p0) << 2) + (p1 - q1) + 4) >> 3)
[all...] |
| /external/arm-neon-tests/ |
| ref_vrshr_n.c | 40 vrshr##Q##_n_##T2##W(VECT_VAR(vector, T1, W, N), \
|
| /external/libjpeg-turbo/simd/ |
| jsimd_arm_neon.S | [all...] |
| /external/valgrind/none/tests/arm/ |
| neon128.stdout.exp | [all...] |
| neon64.stdout.exp | [all...] |
| /external/libvpx/libvpx/vpx_dsp/arm/ |
| loopfilter_8_neon.asm | 346 vrshr.s8 d29, d29, #1
|
| loopfilter_16_neon.asm | 488 vrshr.s8 d29, d29, #1
|
| /external/vixl/src/aarch32/ |
| assembler-aarch32.h | 5540 void vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { function in class:vixl::aarch32::Assembler
5549 void vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.h | [all...] |
