| /external/llvm/test/CodeGen/SystemZ/ |
| vec-abs-01.ll | 124 %and2 = and <16 x i8> %not, %val
125 %ret = or <16 x i8> %and1, %and2
143 %and2 = and <16 x i8> %not, %neg
144 %ret = or <16 x i8> %and1, %and2
|
| vec-abs-02.ll | 122 %and2 = and <8 x i16> %not, %val
123 %ret = or <8 x i16> %and1, %and2
139 %and2 = and <8 x i16> %not, %neg
140 %ret = or <8 x i16> %and1, %and2
|
| vec-abs-03.ll | 120 %and2 = and <4 x i32> %not, %val
121 %ret = or <4 x i32> %and1, %and2
135 %and2 = and <4 x i32> %not, %neg
136 %ret = or <4 x i32> %and1, %and2
|
| vec-abs-04.ll | 120 %and2 = and <2 x i64> %not, %val
121 %ret = or <2 x i64> %and1, %and2
135 %and2 = and <2 x i64> %not, %neg
136 %ret = or <2 x i64> %and1, %and2
|
| and-03.ll | 130 %and2 = and i64 %and1, %val2
131 %and3 = and i64 %and2, %val3
|
| asm-18.ll | 333 %and2 = and i32 %res2, -65536
334 %or2 = or i32 %and2, 34661
352 %and2 = and i32 %res2, -65536
353 %or2 = or i32 %and2, 34661
456 %and2 = and i32 %res2, -8000
457 %res3 = call i32 asm "stepc $0, $1", "=h,h"(i32 %and2)
477 %and2 = and i32 %res2, -8000
478 %res3 = call i32 asm "stepc $0, $1", "=r,r"(i32 %and2)
495 %and2 = and i32 %old, 254
497 "=h,r,r,0"(i32 %old, i32 %and1, i32 %and2)
[all...] |
| and-01.ll | 165 %and2 = and i32 %and1, %val2
166 %and3 = and i32 %and2, %val3
|
| insert-06.ll | 175 %and2 = and i64 %b, 15
176 %or = or i64 %and1, %and2
|
| /external/llvm/test/Transforms/InstCombine/ |
| bswap.ll | 93 %and2 = shl i32 %or, 8
94 %shl3 = and i32 %and2, -16711936
132 %and2 = shl i32 %a, 8
133 %shl1 = and i32 %and2, 65280
|
| or-xor.ll | 159 %and2 = and i32 %notx, %y
160 %xor = xor i32 %and1, %and2
170 %and2 = and i32 %b, -2
171 %xor = or i32 %and1, %and2
|
| and2.ll | 72 %and2 = and i1 %and1, %cmp2
73 ret i1 %and2
|
| /external/antlr/antlr-3.4/runtime/ObjC/Framework/ |
| ANTLRBitSet.m | 68 + (ANTLRBitSet *) of:(NSUInteger) a And2:(NSUInteger) b
77 + (ANTLRBitSet *) of:(NSUInteger)a And2:(NSUInteger)b And3:(NSUInteger)c
88 + (ANTLRBitSet *) of:(NSUInteger)a And2:(NSUInteger)b And3:(NSUInteger)c And4:(NSUInteger)d
|
| /external/llvm/test/CodeGen/PowerPC/ |
| bperm.ll | 246 %and2 = and i64 %x, -4294967296
247 %or = or i64 %and1, %and2
264 %and2 = and i64 %x, -256
265 %or = or i64 %and1, %and2
|
| /external/llvm/test/CodeGen/Mips/ |
| mips16fpe.ll | 298 %and2 = and i1 %lnot, %cmp1
299 %and = zext i1 %and2 to i32
314 %and2 = and i1 %lnot, %cmp1
315 %and = zext i1 %and2 to i32
360 %and2 = and i1 %lnot, %cmp1
361 %and = zext i1 %and2 to i32
375 %and2 = and i1 %lnot, %cmp1
376 %and = zext i1 %and2 to i32
|
| /art/test/565-checker-doublenegbitwise/src/ |
| Main.java | 279 /// CHECK: <<And2:i\d+>> And [<<Not2>>,<<One>>]
282 /// CHECK: <<Add:i\d+>> Add [<<And2>>,<<And1>>]
290 /// CHECK: <<And2:i\d+>> And [<<Not2>>,<<One>>]
293 /// CHECK: <<Add:i\d+>> Add [<<And2>>,<<And1>>]
|
| /art/test/646-checker-hadd-alt-byte/src/ |
| Main.java | 62 /// CHECK-DAG: <<And2:i\d+>> And [<<Get2>>,<<I255>>] loop:<<Loop>> outer_loop:none
63 /// CHECK-DAG: <<Add:i\d+>> Add [<<And1>>,<<And2>>] loop:<<Loop>> outer_loop:none
112 /// CHECK-DAG: <<And2:i\d+>> And [<<Get2>>,<<I255>>] loop:<<Loop>> outer_loop:none
113 /// CHECK-DAG: <<Add1:i\d+>> Add [<<And1>>,<<And2>>] loop:<<Loop>> outer_loop:none
|
| /art/test/646-checker-hadd-alt-char/src/ |
| Main.java | 62 /// CHECK-DAG: <<And2:i\d+>> And [<<Get2>>,<<IMAX>>] loop:<<Loop>> outer_loop:none
63 /// CHECK-DAG: <<Add:i\d+>> Add [<<And1>>,<<And2>>] loop:<<Loop>> outer_loop:none
115 /// CHECK-DAG: <<And2:i\d+>> And [<<Get2>>,<<IMAX>>] loop:<<Loop>> outer_loop:none
116 /// CHECK-DAG: <<Add1:i\d+>> Add [<<And1>>,<<And2>>] loop:<<Loop>> outer_loop:none
|
| /art/test/646-checker-hadd-alt-short/src/ |
| Main.java | 62 /// CHECK-DAG: <<And2:i\d+>> And [<<Get2>>,<<UMAX>>] loop:<<Loop>> outer_loop:none
63 /// CHECK-DAG: <<Add:i\d+>> Add [<<And1>>,<<And2>>] loop:<<Loop>> outer_loop:none
112 /// CHECK-DAG: <<And2:i\d+>> And [<<Get2>>,<<UMAX>>] loop:<<Loop>> outer_loop:none
113 /// CHECK-DAG: <<Add1:i\d+>> Add [<<And1>>,<<And2>>] loop:<<Loop>> outer_loop:none
|
| /art/test/646-checker-hadd-byte/src/ |
| Main.java | 59 /// CHECK-DAG: <<And2:i\d+>> And [<<Get2>>,<<I255>>] loop:<<Loop>> outer_loop:none
60 /// CHECK-DAG: <<Add:i\d+>> Add [<<And1>>,<<And2>>] loop:<<Loop>> outer_loop:none
109 /// CHECK-DAG: <<And2:i\d+>> And [<<Get2>>,<<I255>>] loop:<<Loop>> outer_loop:none
110 /// CHECK-DAG: <<Add1:i\d+>> Add [<<And1>>,<<And2>>] loop:<<Loop>> outer_loop:none
|
| /art/test/646-checker-hadd-char/src/ |
| Main.java | 59 /// CHECK-DAG: <<And2:i\d+>> And [<<Get2>>,<<IMAX>>] loop:<<Loop>> outer_loop:none
60 /// CHECK-DAG: <<Add:i\d+>> Add [<<And1>>,<<And2>>] loop:<<Loop>> outer_loop:none
112 /// CHECK-DAG: <<And2:i\d+>> And [<<Get2>>,<<IMAX>>] loop:<<Loop>> outer_loop:none
113 /// CHECK-DAG: <<Add1:i\d+>> Add [<<And1>>,<<And2>>] loop:<<Loop>> outer_loop:none
|
| /art/test/646-checker-hadd-short/src/ |
| Main.java | 59 /// CHECK-DAG: <<And2:i\d+>> And [<<Get2>>,<<UMAX>>] loop:<<Loop>> outer_loop:none
60 /// CHECK-DAG: <<Add:i\d+>> Add [<<And1>>,<<And2>>] loop:<<Loop>> outer_loop:none
109 /// CHECK-DAG: <<And2:i\d+>> And [<<Get2>>,<<UMAX>>] loop:<<Loop>> outer_loop:none
110 /// CHECK-DAG: <<Add1:i\d+>> Add [<<And1>>,<<And2>>] loop:<<Loop>> outer_loop:none
|
| /external/llvm/test/CodeGen/X86/ |
| bmi-intrinsics-fast-isel-x86_64.ll | 107 %and2 = and i32 %a2, 255
108 %shl = shl i32 %and2, 8
|
| /external/llvm/test/Transforms/InstSimplify/ |
| reassociate.ll | 25 define i32 @and2(i32 %x, i32 %y) {
26 ; CHECK-LABEL: @and2(
|
| /external/llvm/test/Transforms/WholeProgramDevirt/ |
| virtual-const-prop-check.ll | 110 ; CHECK: [[AND2:%[^ ]*]] = and i1 [[VTCMP2]], true
113 ; CHECK: ret i1 [[AND2]]
|
| /external/swiftshader/third_party/LLVM/test/Transforms/InstSimplify/ |
| reassociate.ll | 21 define i32 @and2(i32 %x, i32 %y) {
22 ; CHECK: @and2
|
