| /bionic/libc/arch-arm/cortex-a9/bionic/ |
| __strcat_chk.S | 62 ands r3, r0, #7
73 ands ip, ip, #0x80808080
78 ands ip, ip, #0x80808080
154 ands ip, ip, #0x80808080
|
| strlen.S | 67 ands r3, r0, #7
78 ands ip, ip, #0x80808080
83 ands ip, ip, #0x80808080
159 ands ip, ip, #0x80808080
|
| memcpy_base.S | 46 ands r3, r3, #0x3
55 ands r3, r3, #0xF
156 ands r3, #3
|
| /external/llvm/test/CodeGen/PowerPC/ |
| rlwinm2.ll | 1 ; All of these ands and shifts should be folded into rlw[i]nm instructions
|
| /external/llvm/test/CodeGen/SystemZ/ |
| atomicrmw-and-01.ll | 1 ; Test 8-bit atomic ANDs.
77 ; Check ANDs of -2 (-1 isn't useful). We AND the rotated word with 0xfeffffff.
91 ; Check ANDs of 1. We AND the rotated word with 0x01ffffff.
119 ; Check ANDs of a large unsigned value. We AND the rotated word with
|
| atomicrmw-and-02.ll | 1 ; Test 16-bit atomic ANDs.
78 ; Check ANDs of -2 (-1 isn't useful). We AND the rotated word with 0xfffeffff.
92 ; Check ANDs of 1. We AND the rotated word with 0x0001ffff.
120 ; Check ANDs of a large unsigned value. We AND the rotated word with
|
| risbg-02.ll | 5 ; Test a case with two ANDs.
27 ; Test a case with two ANDs and a shift.
96 ; ands with complement masks.
109 ; ands with incompatible masks.
|
| and-02.ll | 1 ; Test 32-bit ANDs in which the second operand is constant.
5 ; ANDs with 1 can use NILF.
32 ; ANDs with 5 must use NILF.
86 ; ANDs of 0xffff are zero extensions from i16.
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/ |
| rlwinm2.ll | 1 ; All of these ands and shifts should be folded into rlw[i]nm instructions
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
| thumb2-and.ll | 5 ; CHECK: ands r0, r1
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| armv1.s | 5 ands r0, r0, r0
|
| /bionic/libc/arch-arm64/denver64/bionic/ |
| memset.S | 83 ands A_lw, val, #255
97 ands tmp1, count, #0xC0
112 ands tmp1, count, #0x30
153 ands tmp2, tmp2, #15
203 ands tmp2, tmp2, #15
247 ands tmp2, tmp2, zva_bits_x
274 ands count, count, zva_bits_x
|
| memcpy_base.S | 72 ands tmp1, count, #0x30
89 ands count, count, #15
124 ands tmp2, tmp2, #15 /* Bytes to reach alignment. */
|
| /bionic/libc/arch-arm/generic/bionic/ |
| memset.S | 53 ands r3, r3, #3
78 ands r3, r3, #0x1C
|
| strcmp.S | 61 ands r2, r0, #3
180 ands r3, r3, b1, lsl #7
228 ands r3, r3, b1, lsl #7
273 ands r3, r3, b1, lsl #7
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| arm_instructions.s | 18 @ CHECK: ands r1, r2, r3 @ encoding: [0x03,0x10,0x12,0xe0]
19 ands r1,r2,r3
|
| /external/vixl/test/aarch32/config/ |
| cond-rd-rn-operand-const-a32.json | 37 "Ands", // ANDS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; A1
|
| cond-rd-rn-operand-const-t32.json | 43 "Ands", // ANDS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1
|
| /external/llvm/include/llvm/Transforms/Scalar/ |
| BDCE.h | 11 // instructions (shifts, some ands, ors, etc.) kill some of their input bits.
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-ands-bad-peephole.ll | 2 ; Check that ANDS (tst) is not merged with ADD when the immediate
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-and.ll | 5 ; CHECK: ands r0, r1
|
| /external/valgrind/none/tests/arm/ |
| v6intThumb.c | [all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/metag/ |
| metafpu21.s | 583 F ANDS FX.0,D0Re0,A0FrP
586 F ANDS FX.0,D0.7,RD
589 F ANDS FX.1,D0Re0,D1.7
592 F ANDS FX.1,D0.7,D1Re0
595 F ANDS FX.2,D0Re0,D0.7
598 F ANDS FX.2,D0.7,A1.3
601 F ANDS FX.3,D0Re0,A1LbP
604 F ANDS FX.3,D0.7,D0Re0
607 F ANDS FX.3,D0.7,A0.2
610 F ANDS FX.4,D0Re0,A0Fr
[all...] |
| /external/llvm/test/MC/ARM/ |
| thumb2-narrow-dp.ll | 106 ANDS r0, r2, r1 // Must be wide - 3 distinct registers
107 ANDS r2, r2, r1 // Should choose narrow
108 ANDS r2, r1, r2 // Should choose narrow - commutative
109 ANDS.W r0, r0, r1 // Explicitly wide
110 ANDS.W r3, r1, r3
112 ANDS r7, r7, r1 // Should use narrow
113 ANDS r7, r1, r7 // Commutative
114 ANDS r8, r1, r8 // high registers so must use wide encoding
115 ANDS r8, r8, r1
116 ANDS r0, r8, r
[all...] |
| /bionic/libc/arch-arm/cortex-a7/bionic/ |
| memcpy_base.S | 78 ands r3, r3, #0xF
109 ands r3, r3, #0x30
118 ands r3, r3, #0x10
|
